Lines Matching defs:ov01a10
277 struct ov01a10 {
295 static inline struct ov01a10 *to_ov01a10(struct v4l2_subdev *subdev)
297 return container_of(subdev, struct ov01a10, sd);
300 static int ov01a10_read_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 *val)
302 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
331 static int ov01a10_write_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 val)
333 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
350 static int ov01a10_write_reg_list(struct ov01a10 *ov01a10,
353 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
358 ret = ov01a10_write_reg(ov01a10, r_list->regs[i].address, 1,
371 static int ov01a10_update_digital_gain(struct ov01a10 *ov01a10, u32 d_gain)
373 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
377 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_B, 3, real);
383 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GB, 3, real);
389 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GR, 3, real);
395 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_R, 3, real);
402 static int ov01a10_test_pattern(struct ov01a10 *ov01a10, u32 pattern)
409 return ov01a10_write_reg(ov01a10, OV01A10_REG_TEST_PATTERN, 1, pattern);
413 static int ov01a10_set_hflip(struct ov01a10 *ov01a10, u32 hflip)
419 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_X_WIN, 1, offset);
423 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_FORMAT1, 1, &val);
430 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);
433 static int ov01a10_set_vflip(struct ov01a10 *ov01a10, u32 vflip)
439 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_Y_WIN, 1, offset);
443 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_FORMAT1, 1, &val);
450 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);
455 struct ov01a10 *ov01a10 = container_of(ctrl->handler,
456 struct ov01a10, ctrl_handler);
457 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
462 exposure_max = ov01a10->cur_mode->height + ctrl->val -
464 __v4l2_ctrl_modify_range(ov01a10->exposure,
465 ov01a10->exposure->minimum,
466 exposure_max, ov01a10->exposure->step,
475 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_ANALOG_GAIN, 2,
480 ret = ov01a10_update_digital_gain(ov01a10, ctrl->val);
484 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_EXPOSURE, 2,
489 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_VTS, 2,
490 ov01a10->cur_mode->height + ctrl->val);
494 ret = ov01a10_test_pattern(ov01a10, ctrl->val);
498 ov01a10_set_hflip(ov01a10, ctrl->val);
502 ov01a10_set_vflip(ov01a10, ctrl->val);
519 static int ov01a10_init_controls(struct ov01a10 *ov01a10)
521 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
534 ctrl_hdlr = &ov01a10->ctrl_handler;
539 cur_mode = ov01a10->cur_mode;
542 ov01a10->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
547 if (ov01a10->link_freq)
548 ov01a10->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
550 ov01a10->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops,
557 ov01a10->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops,
562 ov01a10->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops,
565 if (ov01a10->hblank)
566 ov01a10->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
576 ov01a10->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops,
603 ov01a10->sd.ctrl_handler = ctrl_hdlr;
622 static int ov01a10_start_streaming(struct ov01a10 *ov01a10)
624 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
629 link_freq_index = ov01a10->cur_mode->link_freq_index;
631 ret = ov01a10_write_reg_list(ov01a10, reg_list);
637 reg_list = &ov01a10->cur_mode->reg_list;
638 ret = ov01a10_write_reg_list(ov01a10, reg_list);
644 ret = __v4l2_ctrl_handler_setup(ov01a10->sd.ctrl_handler);
648 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1,
656 static void ov01a10_stop_streaming(struct ov01a10 *ov01a10)
658 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
661 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1,
669 struct ov01a10 *ov01a10 = to_ov01a10(sd);
675 if (ov01a10->streaming == enable)
683 ret = ov01a10_start_streaming(ov01a10);
692 ov01a10_stop_streaming(ov01a10);
695 ov01a10->streaming = enable;
706 struct ov01a10 *ov01a10 = to_ov01a10(sd);
710 if (ov01a10->streaming)
711 ov01a10_stop_streaming(ov01a10);
722 struct ov01a10 *ov01a10 = to_ov01a10(sd);
727 if (!ov01a10->streaming)
730 ret = ov01a10_start_streaming(ov01a10);
732 ov01a10->streaming = false;
733 ov01a10_stop_streaming(ov01a10);
746 struct ov01a10 *ov01a10 = to_ov01a10(sd);
759 ov01a10->cur_mode = mode;
760 __v4l2_ctrl_s_ctrl(ov01a10->link_freq, mode->link_freq_index);
761 __v4l2_ctrl_s_ctrl_int64(ov01a10->pixel_rate, OV01A10_SCLK);
764 __v4l2_ctrl_modify_range(ov01a10->vblank,
768 __v4l2_ctrl_s_ctrl(ov01a10->vblank, vblank_def);
770 __v4l2_ctrl_modify_range(ov01a10->hblank, h_blank, h_blank, 1,
882 static int ov01a10_identify_module(struct ov01a10 *ov01a10)
884 struct i2c_client *client = v4l2_get_subdevdata(&ov01a10->sd);
888 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_CHIP_ID, 3, &val);
916 struct ov01a10 *ov01a10;
919 ov01a10 = devm_kzalloc(dev, sizeof(*ov01a10), GFP_KERNEL);
920 if (!ov01a10)
923 v4l2_i2c_subdev_init(&ov01a10->sd, client, &ov01a10_subdev_ops);
925 ret = ov01a10_identify_module(ov01a10);
930 ov01a10->cur_mode = &supported_modes[0];
932 ret = ov01a10_init_controls(ov01a10);
938 ov01a10->sd.state_lock = ov01a10->ctrl_handler.lock;
939 ov01a10->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
941 ov01a10->sd.entity.ops = &ov01a10_subdev_entity_ops;
942 ov01a10->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
943 ov01a10->pad.flags = MEDIA_PAD_FL_SOURCE;
945 ret = media_entity_pads_init(&ov01a10->sd.entity, 1, &ov01a10->pad);
951 ret = v4l2_subdev_init_finalize(&ov01a10->sd);
965 ret = v4l2_async_register_subdev_sensor(&ov01a10->sd);
978 media_entity_cleanup(&ov01a10->sd.entity);
981 v4l2_ctrl_handler_free(ov01a10->sd.ctrl_handler);
1001 .name = "ov01a10",