Lines Matching refs:ret
230 int ret;
237 ret = regmap_write(map, MT9V032_AEC_AGC_ENABLE, value);
238 if (ret < 0)
239 return ret;
265 int ret;
269 ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
270 if (ret < 0)
271 return ret;
274 ret = clk_prepare_enable(mt9v032->clk);
275 if (ret)
276 return ret;
292 ret = regmap_write(map, MT9V032_RESET, 1);
293 if (ret < 0)
296 ret = regmap_write(map, MT9V032_RESET, 0);
297 if (ret < 0)
300 ret = regmap_write(map, MT9V032_CHIP_CONTROL,
302 if (ret < 0)
309 return ret;
320 int ret;
327 ret = mt9v032_power_on(mt9v032);
328 if (ret < 0)
329 return ret;
333 ret = regmap_write(map, mt9v032->model->data->pclk_reg,
335 if (ret < 0)
336 return ret;
340 ret = regmap_write(map, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
341 if (ret < 0)
342 return ret;
392 int ret;
400 ret = regmap_update_bits(map, MT9V032_READ_MODE,
404 if (ret < 0)
405 return ret;
407 ret = regmap_write(map, MT9V032_COLUMN_START, crop->left);
408 if (ret < 0)
409 return ret;
411 ret = regmap_write(map, MT9V032_ROW_START, crop->top);
412 if (ret < 0)
413 return ret;
415 ret = regmap_write(map, MT9V032_WINDOW_WIDTH, crop->width);
416 if (ret < 0)
417 return ret;
419 ret = regmap_write(map, MT9V032_WINDOW_HEIGHT, crop->height);
420 if (ret < 0)
421 return ret;
423 ret = mt9v032_update_hblank(mt9v032);
424 if (ret < 0)
425 return ret;
478 int ret;
480 ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
482 if (ret < 0)
483 dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
853 int ret = 0;
861 ret = __mt9v032_set_power(mt9v032, !!on);
862 if (ret < 0)
872 return ret;
885 int ret;
890 ret = mt9v032_power_on(mt9v032);
891 if (ret < 0) {
893 return ret;
897 ret = regmap_read(mt9v032->regmap, MT9V032_CHIP_VERSION, &version);
901 if (ret < 0) {
903 return ret;
924 return ret;
1053 int ret;
1146 ret = mt9v032->ctrls.error;
1178 ret = media_entity_pads_init(&mt9v032->subdev.entity, 1, &mt9v032->pad);
1179 if (ret < 0)
1183 ret = v4l2_async_register_subdev(&mt9v032->subdev);
1184 if (ret < 0)
1192 return ret;