Lines Matching refs:x00
56 #define ISL7998X_REG_P0_PRODUCT_ID_CODE ISL7998X_REG(0, 0x00)
252 #define ISL7998X_REG_P5_LI_ENGINE_CTL ISL7998X_REG(5, 0x00)
315 { ISL7998X_REG_PX_DEC_SDT(0x1), 0x00 },
317 { ISL7998X_REG_PX_DEC_SDT(0x2), 0x00 },
319 { ISL7998X_REG_PX_DEC_SDT(0x3), 0x00 },
321 { ISL7998X_REG_PX_DEC_SDT(0x4), 0x00 },
323 { ISL7998X_REG_P5_LI_ENGINE_CTL, 0x00 },
325 { ISL7998X_REG_P0_IO_BUFFER_CTL, 0x00 },
329 { ISL7998X_REG_P0_CHAN_2_IRQ, 0x00 },
330 { ISL7998X_REG_P0_CHAN_3_IRQ, 0x00 },
331 { ISL7998X_REG_P0_CHAN_4_IRQ, 0x00 },
340 { ISL7998X_REG_P5_TP_GEN_MIPI, 0x00 },
342 { ISL7998X_REG_P5_MIPI_SP_HS_TRL_CTL, 0x00 },
343 { ISL7998X_REG_P5_TP_GEN_RND_SYNC_CTL_1, 0x00 },
347 { ISL7998X_REG_P5_PSF_FIELD_END_CTL_3, 0x00 },
349 { ISL7998X_REG_P5_MIPI_ANA_DATA_CTL_1, 0x00 },
350 { ISL7998X_REG_P5_MIPI_ANA_DATA_CTL_2, 0x00 },
351 { ISL7998X_REG_P5_MIPI_ANA_CLK_CTL, 0x00 },
354 { ISL7998X_REG_P5_PLL_ANA, 0x00 },
361 { ISL7998X_REG_PX_ACA_XFER_HIST_HOST(0xf), 0x00 },
370 { ISL7998X_REG_P5_LI_ENGINE_TYPE_CTL, 0x00 },
374 { ISL7998X_REG_P5_ONE_FIELD_MODE_CTL, 0x00 },
378 { ISL7998X_REG_P5_LI_ENGINE_TP_GEN_CTL, 0x00 },
380 { ISL7998X_REG_P5_LI_ENGINE_CTL_2, 0x00 },
389 { ISL7998X_REG_P5_MIPI_DPHY_PARAMS_1, 0x00 },
399 { ISL7998X_REG_P5_TP_GEN_RND_SYNC_CTL_1, 0x00 },
400 { ISL7998X_REG_P5_TP_GEN_RND_SYNC_CTL_2, 0x00 },
405 { ISL7998X_REG_P5_HIST_LINE_CNT_1, 0x00 },
407 { ISL7998X_REG_P5_LI_ENGINE_FIFO_CTL, 0x00 },
408 { ISL7998X_REG_P5_MIPI_ANA, 0x00 },
413 { ISL7998X_REG_P0_SW_RESET_CTL, 0x00, 50 },
668 static const u32 isl7998x_video_in_chan_map[] = { 0x00, 0x11, 0x02, 0x02 };