Lines Matching defs:IMX415_REG_8BIT
31 #define IMX415_REG_8BIT(n) ((1 << 16) | (n))
37 #define IMX415_MODE IMX415_REG_8BIT(0x3000)
40 #define IMX415_REGHOLD IMX415_REG_8BIT(0x3001)
43 #define IMX415_XMSTA IMX415_REG_8BIT(0x3002)
48 #define IMX415_WINMODE IMX415_REG_8BIT(0x301C)
49 #define IMX415_ADDMODE IMX415_REG_8BIT(0x3022)
50 #define IMX415_REVERSE IMX415_REG_8BIT(0x3030)
53 #define IMX415_ADBIT IMX415_REG_8BIT(0x3031)
54 #define IMX415_MDBIT IMX415_REG_8BIT(0x3032)
55 #define IMX415_SYS_MODE IMX415_REG_8BIT(0x3033)
56 #define IMX415_OUTSEL IMX415_REG_8BIT(0x30C0)
57 #define IMX415_DRV IMX415_REG_8BIT(0x30C1)
67 #define IMX415_TPG_EN_DUOUT IMX415_REG_8BIT(0x30E4)
68 #define IMX415_TPG_PATSEL_DUOUT IMX415_REG_8BIT(0x30E6)
69 #define IMX415_TPG_COLORWIDTH IMX415_REG_8BIT(0x30E8)
70 #define IMX415_TESTCLKEN_MIPI IMX415_REG_8BIT(0x3110)
71 #define IMX415_INCKSEL1 IMX415_REG_8BIT(0x3115)
72 #define IMX415_INCKSEL2 IMX415_REG_8BIT(0x3116)
75 #define IMX415_INCKSEL5 IMX415_REG_8BIT(0x311E)
76 #define IMX415_DIG_CLP_MODE IMX415_REG_8BIT(0x32C8)
77 #define IMX415_WRJ_OPEN IMX415_REG_8BIT(0x3390)
85 #define IMX415_INCKSEL6 IMX415_REG_8BIT(0x400C)
95 #define IMX415_INCKSEL7 IMX415_REG_8BIT(0x4074)
387 { IMX415_REG_8BIT(0x32D4), 0x21 },
388 { IMX415_REG_8BIT(0x32EC), 0xA1 },
389 { IMX415_REG_8BIT(0x3452), 0x7F },
390 { IMX415_REG_8BIT(0x3453), 0x03 },
391 { IMX415_REG_8BIT(0x358A), 0x04 },
392 { IMX415_REG_8BIT(0x35A1), 0x02 },
393 { IMX415_REG_8BIT(0x36BC), 0x0C },
394 { IMX415_REG_8BIT(0x36CC), 0x53 },
395 { IMX415_REG_8BIT(0x36CD), 0x00 },
396 { IMX415_REG_8BIT(0x36CE), 0x3C },
397 { IMX415_REG_8BIT(0x36D0), 0x8C },
398 { IMX415_REG_8BIT(0x36D1), 0x00 },
399 { IMX415_REG_8BIT(0x36D2), 0x71 },
400 { IMX415_REG_8BIT(0x36D4), 0x3C },
401 { IMX415_REG_8BIT(0x36D6), 0x53 },
402 { IMX415_REG_8BIT(0x36D7), 0x00 },
403 { IMX415_REG_8BIT(0x36D8), 0x71 },
404 { IMX415_REG_8BIT(0x36DA), 0x8C },
405 { IMX415_REG_8BIT(0x36DB), 0x00 },
406 { IMX415_REG_8BIT(0x3724), 0x02 },
407 { IMX415_REG_8BIT(0x3726), 0x02 },
408 { IMX415_REG_8BIT(0x3732), 0x02 },
409 { IMX415_REG_8BIT(0x3734), 0x03 },
410 { IMX415_REG_8BIT(0x3736), 0x03 },
411 { IMX415_REG_8BIT(0x3742), 0x03 },
412 { IMX415_REG_8BIT(0x3862), 0xE0 },
413 { IMX415_REG_8BIT(0x38CC), 0x30 },
414 { IMX415_REG_8BIT(0x38CD), 0x2F },
415 { IMX415_REG_8BIT(0x395C), 0x0C },
416 { IMX415_REG_8BIT(0x3A42), 0xD1 },
417 { IMX415_REG_8BIT(0x3A4C), 0x77 },
418 { IMX415_REG_8BIT(0x3AE0), 0x02 },
419 { IMX415_REG_8BIT(0x3AEC), 0x0C },
420 { IMX415_REG_8BIT(0x3B00), 0x2E },
421 { IMX415_REG_8BIT(0x3B06), 0x29 },
422 { IMX415_REG_8BIT(0x3B98), 0x25 },
423 { IMX415_REG_8BIT(0x3B99), 0x21 },
424 { IMX415_REG_8BIT(0x3B9B), 0x13 },
425 { IMX415_REG_8BIT(0x3B9C), 0x13 },
426 { IMX415_REG_8BIT(0x3B9D), 0x13 },
427 { IMX415_REG_8BIT(0x3B9E), 0x13 },
428 { IMX415_REG_8BIT(0x3BA1), 0x00 },
429 { IMX415_REG_8BIT(0x3BA2), 0x06 },
430 { IMX415_REG_8BIT(0x3BA3), 0x0B },
431 { IMX415_REG_8BIT(0x3BA4), 0x10 },
432 { IMX415_REG_8BIT(0x3BA5), 0x14 },
433 { IMX415_REG_8BIT(0x3BA6), 0x18 },
434 { IMX415_REG_8BIT(0x3BA7), 0x1A },
435 { IMX415_REG_8BIT(0x3BA8), 0x1A },
436 { IMX415_REG_8BIT(0x3BA9), 0x1A },
437 { IMX415_REG_8BIT(0x3BAC), 0xED },
438 { IMX415_REG_8BIT(0x3BAD), 0x01 },
439 { IMX415_REG_8BIT(0x3BAE), 0xF6 },
440 { IMX415_REG_8BIT(0x3BAF), 0x02 },
441 { IMX415_REG_8BIT(0x3BB0), 0xA2 },
442 { IMX415_REG_8BIT(0x3BB1), 0x03 },
443 { IMX415_REG_8BIT(0x3BB2), 0xE0 },
444 { IMX415_REG_8BIT(0x3BB3), 0x03 },
445 { IMX415_REG_8BIT(0x3BB4), 0xE0 },
446 { IMX415_REG_8BIT(0x3BB5), 0x03 },
447 { IMX415_REG_8BIT(0x3BB6), 0xE0 },
448 { IMX415_REG_8BIT(0x3BB7), 0x03 },
449 { IMX415_REG_8BIT(0x3BB8), 0xE0 },
450 { IMX415_REG_8BIT(0x3BBA), 0xE0 },
451 { IMX415_REG_8BIT(0x3BBC), 0xDA },
452 { IMX415_REG_8BIT(0x3BBE), 0x88 },
453 { IMX415_REG_8BIT(0x3BC0), 0x44 },
454 { IMX415_REG_8BIT(0x3BC2), 0x7B },
455 { IMX415_REG_8BIT(0x3BC4), 0xA2 },
456 { IMX415_REG_8BIT(0x3BC8), 0xBD },
457 { IMX415_REG_8BIT(0x3BCA), 0xBD },