Lines Matching refs:sd
133 void (*set_termination)(struct v4l2_subdev *sd, bool enable);
134 void (*setup_irqs)(struct v4l2_subdev *sd);
135 unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
136 unsigned int (*read_cable_det)(struct v4l2_subdev *sd);
174 struct v4l2_subdev sd;
327 static inline struct adv76xx_state *to_state(struct v4l2_subdev *sd)
329 return container_of(sd, struct adv76xx_state, sd);
381 static inline int io_read(struct v4l2_subdev *sd, u8 reg)
383 struct adv76xx_state *state = to_state(sd);
388 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val)
390 struct adv76xx_state *state = to_state(sd);
395 static inline int io_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask,
398 return io_write(sd, reg, (io_read(sd, reg) & ~mask) | val);
401 static inline int __always_unused avlink_read(struct v4l2_subdev *sd, u8 reg)
403 struct adv76xx_state *state = to_state(sd);
408 static inline int __always_unused avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val)
410 struct adv76xx_state *state = to_state(sd);
415 static inline int cec_read(struct v4l2_subdev *sd, u8 reg)
417 struct adv76xx_state *state = to_state(sd);
422 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
424 struct adv76xx_state *state = to_state(sd);
429 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask,
432 return cec_write(sd, reg, (cec_read(sd, reg) & ~mask) | val);
435 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg)
437 struct adv76xx_state *state = to_state(sd);
442 static inline int __always_unused infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
444 struct adv76xx_state *state = to_state(sd);
449 static inline int __always_unused afe_read(struct v4l2_subdev *sd, u8 reg)
451 struct adv76xx_state *state = to_state(sd);
456 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
458 struct adv76xx_state *state = to_state(sd);
463 static inline int rep_read(struct v4l2_subdev *sd, u8 reg)
465 struct adv76xx_state *state = to_state(sd);
470 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val)
472 struct adv76xx_state *state = to_state(sd);
477 static inline int rep_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
479 return rep_write(sd, reg, (rep_read(sd, reg) & ~mask) | val);
482 static inline int __always_unused edid_read(struct v4l2_subdev *sd, u8 reg)
484 struct adv76xx_state *state = to_state(sd);
489 static inline int __always_unused edid_write(struct v4l2_subdev *sd, u8 reg, u8 val)
491 struct adv76xx_state *state = to_state(sd);
496 static inline int edid_write_block(struct v4l2_subdev *sd,
499 struct adv76xx_state *state = to_state(sd);
504 v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n",
530 io_write_clr_set(&state->sd, 0x20, 0x80 >> i,
534 v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd);
542 struct v4l2_subdev *sd = &state->sd;
544 v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__);
549 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg)
551 struct adv76xx_state *state = to_state(sd);
556 static u16 hdmi_read16(struct v4l2_subdev *sd, u8 reg, u16 mask)
558 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask;
561 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val)
563 struct adv76xx_state *state = to_state(sd);
568 static inline int hdmi_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
570 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val);
573 static inline int __always_unused test_write(struct v4l2_subdev *sd, u8 reg, u8 val)
575 struct adv76xx_state *state = to_state(sd);
580 static inline int cp_read(struct v4l2_subdev *sd, u8 reg)
582 struct adv76xx_state *state = to_state(sd);
587 static u16 cp_read16(struct v4l2_subdev *sd, u8 reg, u16 mask)
589 return ((cp_read(sd, reg) << 8) | cp_read(sd, reg + 1)) & mask;
592 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
594 struct adv76xx_state *state = to_state(sd);
599 static inline int cp_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
601 return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val);
604 static inline int __always_unused vdp_read(struct v4l2_subdev *sd, u8 reg)
606 struct adv76xx_state *state = to_state(sd);
611 static inline int __always_unused vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
613 struct adv76xx_state *state = to_state(sd);
622 static int adv76xx_read_reg(struct v4l2_subdev *sd, unsigned int reg)
624 struct adv76xx_state *state = to_state(sd);
639 static int adv76xx_write_reg(struct v4l2_subdev *sd, unsigned int reg, u8 val)
641 struct adv76xx_state *state = to_state(sd);
652 static void adv76xx_write_reg_seq(struct v4l2_subdev *sd,
658 adv76xx_write_reg(sd, reg_seq[i].reg, reg_seq[i].val);
767 static inline bool is_analog_input(struct v4l2_subdev *sd)
769 struct adv76xx_state *state = to_state(sd);
775 static inline bool is_digital_input(struct v4l2_subdev *sd)
777 struct adv76xx_state *state = to_state(sd);
812 adv76xx_get_dv_timings_cap(struct v4l2_subdev *sd, int pad)
815 struct adv76xx_state *state = to_state(sd);
838 static void adv76xx_inv_register(struct v4l2_subdev *sd)
840 v4l2_info(sd, "0x000-0x0ff: IO Map\n");
841 v4l2_info(sd, "0x100-0x1ff: AVLink Map\n");
842 v4l2_info(sd, "0x200-0x2ff: CEC Map\n");
843 v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n");
844 v4l2_info(sd, "0x400-0x4ff: ESDP Map\n");
845 v4l2_info(sd, "0x500-0x5ff: DPP Map\n");
846 v4l2_info(sd, "0x600-0x6ff: AFE Map\n");
847 v4l2_info(sd, "0x700-0x7ff: Repeater Map\n");
848 v4l2_info(sd, "0x800-0x8ff: EDID Map\n");
849 v4l2_info(sd, "0x900-0x9ff: HDMI Map\n");
850 v4l2_info(sd, "0xa00-0xaff: Test Map\n");
851 v4l2_info(sd, "0xb00-0xbff: CP Map\n");
852 v4l2_info(sd, "0xc00-0xcff: VDP Map\n");
855 static int adv76xx_g_register(struct v4l2_subdev *sd,
860 ret = adv76xx_read_reg(sd, reg->reg);
862 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
863 adv76xx_inv_register(sd);
873 static int adv76xx_s_register(struct v4l2_subdev *sd,
878 ret = adv76xx_write_reg(sd, reg->reg, reg->val);
880 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
881 adv76xx_inv_register(sd);
889 static unsigned int adv7604_read_cable_det(struct v4l2_subdev *sd)
891 u8 value = io_read(sd, 0x6f);
899 static unsigned int adv7611_read_cable_det(struct v4l2_subdev *sd)
901 u8 value = io_read(sd, 0x6f);
906 static unsigned int adv7612_read_cable_det(struct v4l2_subdev *sd)
911 u8 value = io_read(sd, 0x6f);
916 static int adv76xx_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)
918 struct adv76xx_state *state = to_state(sd);
920 u16 cable_det = info->read_cable_det(sd);
925 static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd,
934 is_digital_input(sd) ? 250000 : 1000000, false))
936 io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */
937 io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) +
945 static int configure_predefined_video_timings(struct v4l2_subdev *sd,
948 struct adv76xx_state *state = to_state(sd);
951 v4l2_dbg(1, debug, sd, "%s", __func__);
955 io_write(sd, 0x16, 0x43);
956 io_write(sd, 0x17, 0x5a);
959 cp_write_clr_set(sd, 0x81, 0x10, 0x00);
960 cp_write(sd, 0x8f, 0x00);
961 cp_write(sd, 0x90, 0x00);
962 cp_write(sd, 0xa2, 0x00);
963 cp_write(sd, 0xa3, 0x00);
964 cp_write(sd, 0xa4, 0x00);
965 cp_write(sd, 0xa5, 0x00);
966 cp_write(sd, 0xa6, 0x00);
967 cp_write(sd, 0xa7, 0x00);
968 cp_write(sd, 0xab, 0x00);
969 cp_write(sd, 0xac, 0x00);
971 if (is_analog_input(sd)) {
972 err = find_and_set_predefined_video_timings(sd,
975 err = find_and_set_predefined_video_timings(sd,
977 } else if (is_digital_input(sd)) {
978 err = find_and_set_predefined_video_timings(sd,
981 err = find_and_set_predefined_video_timings(sd,
984 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",
993 static void configure_custom_video_timings(struct v4l2_subdev *sd,
996 struct adv76xx_state *state = to_state(sd);
1010 v4l2_dbg(2, debug, sd, "%s\n", __func__);
1012 if (is_analog_input(sd)) {
1014 io_write(sd, 0x00, 0x07); /* video std */
1015 io_write(sd, 0x01, 0x02); /* prim mode */
1017 cp_write_clr_set(sd, 0x81, 0x10, 0x10);
1024 v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");
1027 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff);
1028 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) |
1030 cp_write(sd, 0xa4, cp_start_eav & 0xff);
1033 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);
1034 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |
1036 cp_write(sd, 0xa7, cp_end_vbi & 0xff);
1037 } else if (is_digital_input(sd)) {
1040 io_write(sd, 0x00, 0x02); /* video std */
1041 io_write(sd, 0x01, 0x06); /* prim mode */
1043 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",
1047 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);
1048 cp_write(sd, 0x90, ch1_fr_ll & 0xff);
1049 cp_write(sd, 0xab, (height >> 4) & 0xff);
1050 cp_write(sd, 0xac, (height & 0x0f) << 4);
1053 static void adv76xx_set_offset(struct v4l2_subdev *sd, bool auto_offset, u16 offset_a, u16 offset_b, u16 offset_c)
1055 struct adv76xx_state *state = to_state(sd);
1064 v4l2_dbg(2, debug, sd, "%s: %s offset: a = 0x%x, b = 0x%x, c = 0x%x\n",
1068 offset_buf[0] = (cp_read(sd, 0x77) & 0xc0) | ((offset_a & 0x3f0) >> 4);
1076 v4l2_err(sd, "%s: i2c error writing to CP reg 0x77, 0x78, 0x79, 0x7a\n", __func__);
1079 static void adv76xx_set_gain(struct v4l2_subdev *sd, bool auto_gain, u16 gain_a, u16 gain_b, u16 gain_c)
1081 struct adv76xx_state *state = to_state(sd);
1094 v4l2_dbg(2, debug, sd, "%s: %s gain: a = 0x%x, b = 0x%x, c = 0x%x\n",
1106 v4l2_err(sd, "%s: i2c error writing to CP reg 0x73, 0x74, 0x75, 0x76\n", __func__);
1109 static void set_rgb_quantization_range(struct v4l2_subdev *sd)
1111 struct adv76xx_state *state = to_state(sd);
1112 bool rgb_output = io_read(sd, 0x02) & 0x02;
1113 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80;
1116 if (hdmi_signal && (io_read(sd, 0x60) & 1))
1117 y = infoframe_read(sd, 0x01) >> 5;
1119 v4l2_dbg(2, debug, sd, "%s: RGB quantization range: %d, RGB out: %d, HDMI: %d\n",
1123 adv76xx_set_gain(sd, true, 0x0, 0x0, 0x0);
1124 adv76xx_set_offset(sd, true, 0x0, 0x0, 0x0);
1125 io_write_clr_set(sd, 0x02, 0x04, rgb_output ? 0 : 4);
1132 io_write_clr_set(sd, 0x02, 0xf0, 0x10);
1139 io_write_clr_set(sd, 0x02, 0xf0, 0xf0);
1146 io_write_clr_set(sd, 0x02, 0xf0, 0xf0);
1155 io_write_clr_set(sd, 0x02, 0xf0, 0x00);
1158 io_write_clr_set(sd, 0x02, 0xf0, 0x10);
1160 if (is_digital_input(sd) && rgb_output) {
1161 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40);
1163 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0);
1164 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70);
1171 io_write_clr_set(sd, 0x02, 0xf0, 0x20);
1179 io_write_clr_set(sd, 0x02, 0xf0, 0x00);
1185 io_write_clr_set(sd, 0x02, 0xf0, 0x60);
1193 io_write_clr_set(sd, 0x02, 0xf0, 0x10);
1195 if (is_analog_input(sd) || hdmi_signal)
1200 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40);
1202 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0);
1203 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70);
1211 struct v4l2_subdev *sd =
1212 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd;
1214 struct adv76xx_state *state = to_state(sd);
1218 cp_write(sd, 0x3c, ctrl->val);
1221 cp_write(sd, 0x3a, ctrl->val);
1224 cp_write(sd, 0x3b, ctrl->val);
1227 cp_write(sd, 0x3d, ctrl->val);
1231 set_rgb_quantization_range(sd);
1240 afe_write(sd, 0xc8, ctrl->val);
1245 cp_write_clr_set(sd, 0xbf, 0x04, ctrl->val << 2);
1248 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16);
1249 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8);
1250 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff));
1258 struct v4l2_subdev *sd =
1259 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd;
1263 if ((io_read(sd, 0x60) & 1) && (infoframe_read(sd, 0x03) & 0x80))
1264 ctrl->val = (infoframe_read(sd, 0x05) >> 4) & 3;
1272 static inline bool no_power(struct v4l2_subdev *sd)
1275 return io_read(sd, 0x0c) & 0x24;
1278 static inline bool no_signal_tmds(struct v4l2_subdev *sd)
1280 struct adv76xx_state *state = to_state(sd);
1282 return !(io_read(sd, 0x6a) & (0x10 >> state->selected_input));
1285 static inline bool no_lock_tmds(struct v4l2_subdev *sd)
1287 struct adv76xx_state *state = to_state(sd);
1290 return (io_read(sd, 0x6a) & info->tdms_lock_mask) != info->tdms_lock_mask;
1293 static inline bool is_hdmi(struct v4l2_subdev *sd)
1295 return hdmi_read(sd, 0x05) & 0x80;
1298 static inline bool no_lock_sspd(struct v4l2_subdev *sd)
1300 struct adv76xx_state *state = to_state(sd);
1310 return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0);
1313 static inline bool no_lock_stdi(struct v4l2_subdev *sd)
1316 return !(cp_read(sd, 0xb1) & 0x80);
1319 static inline bool no_signal(struct v4l2_subdev *sd)
1323 ret = no_power(sd);
1325 ret |= no_lock_stdi(sd);
1326 ret |= no_lock_sspd(sd);
1328 if (is_digital_input(sd)) {
1329 ret |= no_lock_tmds(sd);
1330 ret |= no_signal_tmds(sd);
1336 static inline bool no_lock_cp(struct v4l2_subdev *sd)
1338 struct adv76xx_state *state = to_state(sd);
1345 return io_read(sd, 0x12) & 0x01;
1348 static inline bool in_free_run(struct v4l2_subdev *sd)
1350 return cp_read(sd, 0xff) & 0x10;
1353 static int adv76xx_g_input_status(struct v4l2_subdev *sd, u32 *status)
1356 *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0;
1357 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;
1358 if (!in_free_run(sd) && no_lock_cp(sd))
1359 *status |= is_digital_input(sd) ?
1362 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);
1375 static int stdi2dv_timings(struct v4l2_subdev *sd,
1379 struct adv76xx_state *state = to_state(sd);
1388 adv76xx_get_dv_timings_cap(sd, -1),
1416 v4l2_dbg(2, debug, sd,
1424 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi)
1426 struct adv76xx_state *state = to_state(sd);
1430 if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
1431 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__);
1436 stdi->bl = cp_read16(sd, 0xb1, 0x3fff);
1437 stdi->lcf = cp_read16(sd, info->lcf_reg, 0x7ff);
1438 stdi->lcvs = cp_read(sd, 0xb3) >> 3;
1439 stdi->interlaced = io_read(sd, 0x12) & 0x10;
1443 polarity = cp_read(sd, 0xb5);
1454 polarity = hdmi_read(sd, 0x05);
1459 if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
1460 v4l2_dbg(2, debug, sd,
1466 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__);
1471 v4l2_dbg(2, debug, sd,
1480 static int adv76xx_enum_dv_timings(struct v4l2_subdev *sd,
1483 struct adv76xx_state *state = to_state(sd);
1489 adv76xx_get_dv_timings_cap(sd, timings->pad),
1493 static int adv76xx_dv_timings_cap(struct v4l2_subdev *sd,
1496 struct adv76xx_state *state = to_state(sd);
1502 *cap = *adv76xx_get_dv_timings_cap(sd, pad);
1510 static void adv76xx_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,
1513 v4l2_find_dv_timings_cap(timings, adv76xx_get_dv_timings_cap(sd, -1),
1514 is_digital_input(sd) ? 250000 : 1000000,
1518 static unsigned int adv7604_read_hdmi_pixelclock(struct v4l2_subdev *sd)
1522 a = hdmi_read(sd, 0x06);
1523 b = hdmi_read(sd, 0x3b);
1530 static unsigned int adv7611_read_hdmi_pixelclock(struct v4l2_subdev *sd)
1534 a = hdmi_read(sd, 0x51);
1535 b = hdmi_read(sd, 0x52);
1542 static unsigned int adv76xx_read_hdmi_pixelclock(struct v4l2_subdev *sd)
1544 struct adv76xx_state *state = to_state(sd);
1548 freq = info->read_hdmi_pixelclock(sd);
1549 if (is_hdmi(sd)) {
1551 bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8;
1552 pixelrepetition = (hdmi_read(sd, 0x05) & 0x0f) + 1;
1560 static int adv76xx_query_dv_timings(struct v4l2_subdev *sd,
1563 struct adv76xx_state *state = to_state(sd);
1573 if (no_signal(sd)) {
1575 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);
1580 if (read_stdi(sd, &stdi)) {
1581 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__);
1587 if (is_digital_input(sd)) {
1588 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80;
1592 w = hdmi_read16(sd, 0x07, info->linewidth_mask);
1593 h = hdmi_read16(sd, 0x09, info->field0_height_mask);
1595 if (hdmi_signal && (io_read(sd, 0x60) & 1))
1596 vic = infoframe_read(sd, 0x04);
1606 bt->pixelclock = adv76xx_read_hdmi_pixelclock(sd);
1607 bt->hfrontporch = hdmi_read16(sd, 0x20, info->hfrontporch_mask);
1608 bt->hsync = hdmi_read16(sd, 0x22, info->hsync_mask);
1609 bt->hbackporch = hdmi_read16(sd, 0x24, info->hbackporch_mask);
1610 bt->vfrontporch = hdmi_read16(sd, 0x2a,
1612 bt->vsync = hdmi_read16(sd, 0x2e, info->field0_vsync_mask) / 2;
1613 bt->vbackporch = hdmi_read16(sd, 0x32,
1615 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
1616 ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
1618 bt->height += hdmi_read16(sd, 0x0b,
1620 bt->il_vfrontporch = hdmi_read16(sd, 0x2c,
1622 bt->il_vsync = hdmi_read16(sd, 0x30,
1624 bt->il_vbackporch = hdmi_read16(sd, 0x34,
1627 adv76xx_fill_optional_dv_timings_fields(sd, timings);
1633 if (!stdi2dv_timings(sd, &stdi, timings))
1636 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs);
1637 if (!stdi2dv_timings(sd, &stdi, timings))
1640 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs);
1641 if (stdi2dv_timings(sd, &stdi, timings)) {
1652 v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__);
1655 cp_write_clr_set(sd, 0x86, 0x06, 0x00);
1657 cp_write_clr_set(sd, 0x86, 0x06, 0x04);
1659 cp_write_clr_set(sd, 0x86, 0x06, 0x02);
1663 v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);
1670 if (no_signal(sd)) {
1671 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__);
1676 if ((is_analog_input(sd) && bt->pixelclock > 170000000) ||
1677 (is_digital_input(sd) && bt->pixelclock > 225000000)) {
1678 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",
1684 v4l2_print_dv_timings(sd->name, "adv76xx_query_dv_timings: ",
1690 static int adv76xx_s_dv_timings(struct v4l2_subdev *sd,
1693 struct adv76xx_state *state = to_state(sd);
1701 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__);
1707 if (!v4l2_valid_dv_timings(timings, adv76xx_get_dv_timings_cap(sd, -1),
1711 adv76xx_fill_optional_dv_timings_fields(sd, timings);
1715 cp_write_clr_set(sd, 0x91, 0x40, bt->interlaced ? 0x40 : 0x00);
1718 err = configure_predefined_video_timings(sd, timings);
1722 configure_custom_video_timings(sd, bt);
1725 set_rgb_quantization_range(sd);
1728 v4l2_print_dv_timings(sd->name, "adv76xx_s_dv_timings: ",
1733 static int adv76xx_g_dv_timings(struct v4l2_subdev *sd,
1736 struct adv76xx_state *state = to_state(sd);
1742 static void adv7604_set_termination(struct v4l2_subdev *sd, bool enable)
1744 hdmi_write(sd, 0x01, enable ? 0x00 : 0x78);
1747 static void adv7611_set_termination(struct v4l2_subdev *sd, bool enable)
1749 hdmi_write(sd, 0x83, enable ? 0xfe : 0xff);
1752 static void enable_input(struct v4l2_subdev *sd)
1754 struct adv76xx_state *state = to_state(sd);
1756 if (is_analog_input(sd)) {
1757 io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */
1758 } else if (is_digital_input(sd)) {
1759 hdmi_write_clr_set(sd, 0x00, 0x03, state->selected_input);
1760 state->info->set_termination(sd, true);
1761 io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */
1762 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x00); /* Unmute audio */
1764 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",
1769 static void disable_input(struct v4l2_subdev *sd)
1771 struct adv76xx_state *state = to_state(sd);
1773 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x10); /* Mute audio */
1775 io_write(sd, 0x15, 0xbe); /* Tristate all outputs from video core */
1776 state->info->set_termination(sd, false);
1779 static void select_input(struct v4l2_subdev *sd)
1781 struct adv76xx_state *state = to_state(sd);
1784 if (is_analog_input(sd)) {
1785 adv76xx_write_reg_seq(sd, info->recommended_settings[0]);
1787 afe_write(sd, 0x00, 0x08); /* power up ADC */
1788 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */
1789 afe_write(sd, 0xc8, 0x00); /* phase control */
1790 } else if (is_digital_input(sd)) {
1791 hdmi_write(sd, 0x00, state->selected_input & 0x03);
1793 adv76xx_write_reg_seq(sd, info->recommended_settings[1]);
1796 afe_write(sd, 0x00, 0xff); /* power down ADC */
1797 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */
1798 afe_write(sd, 0xc8, 0x40); /* phase control */
1801 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */
1802 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
1803 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */
1805 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",
1810 cp_write_clr_set(sd, 0x3e, 0x80, 0x80);
1813 static int adv76xx_s_routing(struct v4l2_subdev *sd,
1816 struct adv76xx_state *state = to_state(sd);
1818 v4l2_dbg(2, debug, sd, "%s: input %d, selected input %d",
1829 disable_input(sd);
1830 select_input(sd);
1831 enable_input(sd);
1833 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt);
1838 static int adv76xx_enum_mbus_code(struct v4l2_subdev *sd,
1842 struct adv76xx_state *state = to_state(sd);
1906 struct v4l2_subdev *sd = &state->sd;
1908 io_write_clr_set(sd, 0x02, 0x02,
1910 io_write(sd, 0x03, state->format->op_format_sel |
1912 io_write_clr_set(sd, 0x04, 0xe0, adv76xx_op_ch_sel(state));
1913 io_write_clr_set(sd, 0x05, 0x01,
1915 set_rgb_quantization_range(sd);
1918 static int adv76xx_get_format(struct v4l2_subdev *sd,
1922 struct adv76xx_state *state = to_state(sd);
1932 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1941 static int adv76xx_get_selection(struct v4l2_subdev *sd,
1945 struct adv76xx_state *state = to_state(sd);
1961 static int adv76xx_set_format(struct v4l2_subdev *sd,
1965 struct adv76xx_state *state = to_state(sd);
1981 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1992 static void adv76xx_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
1994 struct adv76xx_state *state = to_state(sd);
1996 if ((cec_read(sd, 0x11) & 0x01) == 0) {
1997 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
2002 v4l2_dbg(1, debug, sd, "%s: tx raw: arbitration lost\n",
2013 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
2019 nack_cnt = cec_read(sd, 0x14) & 0xf;
2022 low_drive_cnt = cec_read(sd, 0x14) >> 4;
2030 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
2036 static void adv76xx_cec_isr(struct v4l2_subdev *sd, bool *handled)
2038 struct adv76xx_state *state = to_state(sd);
2043 cec_irq = io_read(sd, info->cec_irq_status) & 0x0f;
2047 v4l2_dbg(1, debug, sd, "%s: cec: irq 0x%x\n", __func__, cec_irq);
2048 adv76xx_cec_tx_raw_status(sd, cec_irq);
2052 msg.len = cec_read(sd, 0x25) & 0x1f;
2060 msg.msg[i] = cec_read(sd, i + 0x15);
2061 cec_write(sd, info->cec_rx_enable,
2075 io_write(sd, info->cec_irq_status + 1, cec_irq);
2085 struct v4l2_subdev *sd = &state->sd;
2088 cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */
2089 cec_write(sd, 0x2c, 0x01); /* cec soft reset */
2090 cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */
2096 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x0f);
2097 cec_write(sd, info->cec_rx_enable, info->cec_rx_enable_mask);
2100 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x00);
2102 cec_write_clr_set(sd, 0x27, 0x70, 0x00);
2104 cec_write_clr_set(sd, 0x2a, 0x01, 0x00);
2108 adv76xx_s_detect_tx_5v_ctrl(sd);
2115 struct v4l2_subdev *sd = &state->sd;
2122 cec_write_clr_set(sd, 0x27, 0x70, 0);
2146 cec_write_clr_set(sd, 0x27, 0x10, 0x10);
2148 cec_write_clr_set(sd, 0x28, 0x0f, addr);
2152 cec_write_clr_set(sd, 0x27, 0x20, 0x20);
2154 cec_write_clr_set(sd, 0x28, 0xf0, addr << 4);
2158 cec_write_clr_set(sd, 0x27, 0x40, 0x40);
2160 cec_write_clr_set(sd, 0x29, 0x0f, addr);
2170 struct v4l2_subdev *sd = &state->sd;
2179 cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4);
2182 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
2188 cec_write(sd, i, msg->msg[i]);
2191 cec_write(sd, 0x10, len);
2193 cec_write(sd, 0x11, 0x01);
2204 static int adv76xx_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
2206 struct adv76xx_state *state = to_state(sd);
2208 const u8 irq_reg_0x43 = io_read(sd, 0x43);
2209 const u8 irq_reg_0x6b = io_read(sd, 0x6b);
2210 const u8 irq_reg_0x70 = io_read(sd, 0x70);
2216 io_write(sd, 0x44, irq_reg_0x43);
2218 io_write(sd, 0x71, irq_reg_0x70);
2220 io_write(sd, 0x6c, irq_reg_0x6b);
2222 v4l2_dbg(2, debug, sd, "%s: ", __func__);
2226 fmt_change_digital = is_digital_input(sd)
2231 v4l2_dbg(1, debug, sd,
2235 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt);
2242 v4l2_dbg(1, debug, sd, "%s: irq %s mode\n", __func__,
2243 (io_read(sd, 0x6a) & 0x01) ? "HDMI" : "DVI");
2244 set_rgb_quantization_range(sd);
2251 adv76xx_cec_isr(sd, handled);
2257 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v);
2258 adv76xx_s_detect_tx_5v_ctrl(sd);
2270 adv76xx_isr(&state->sd, 0, &handled);
2275 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
2277 struct adv76xx_state *state = to_state(sd);
2313 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
2315 struct adv76xx_state *state = to_state(sd);
2332 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);
2343 v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n",
2366 v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n",
2372 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, 0x00);
2380 rep_write(sd, info->edid_spa_port_b_reg, pa >> 8);
2381 rep_write(sd, info->edid_spa_port_b_reg + 1, pa & 0xff);
2384 rep_write(sd, info->edid_spa_port_b_reg + 2, pa >> 8);
2385 rep_write(sd, info->edid_spa_port_b_reg + 3, pa & 0xff);
2388 rep_write(sd, info->edid_spa_port_b_reg + 4, pa >> 8);
2389 rep_write(sd, info->edid_spa_port_b_reg + 5, pa & 0xff);
2398 rep_write(sd, info->edid_spa_loc_reg, spa_loc & 0xff);
2399 rep_write_clr_set(sd, info->edid_spa_loc_reg + 1,
2412 rep_write_clr_set(sd, info->edid_segment_reg,
2414 err = edid_write_block(sd, 128 * min(edid->blocks, 2U), state->edid.edid);
2416 v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad);
2420 rep_write_clr_set(sd, info->edid_segment_reg,
2423 err = edid_write_block(sd, 128 * (edid->blocks - 2),
2426 v4l2_err(sd, "error %d writing edid pad %d\n",
2434 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);
2437 if (rep_read(sd, info->edid_status_reg) & state->edid.present)
2442 v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present);
2461 static int adv76xx_read_infoframe(struct v4l2_subdev *sd, int index,
2468 if (!(io_read(sd, 0x60) & adv76xx_cri[index].present_mask)) {
2469 v4l2_info(sd, "%s infoframe not received\n",
2475 buffer[i] = infoframe_read(sd,
2481 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__,
2487 buffer[i + 3] = infoframe_read(sd,
2491 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__,
2498 static void adv76xx_log_infoframes(struct v4l2_subdev *sd)
2502 if (!is_hdmi(sd)) {
2503 v4l2_info(sd, "receive DVI-D signal, no infoframes\n");
2509 struct i2c_client *client = v4l2_get_subdevdata(sd);
2511 if (!adv76xx_read_infoframe(sd, i, &frame))
2516 static int adv76xx_log_status(struct v4l2_subdev *sd)
2518 struct adv76xx_state *state = to_state(sd);
2522 u8 reg_io_0x02 = io_read(sd, 0x02);
2560 v4l2_info(sd, "-----Chip status-----\n");
2561 v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");
2562 edid_enabled = rep_read(sd, info->edid_status_reg);
2563 v4l2_info(sd, "EDID enabled port A: %s, B: %s, C: %s, D: %s\n",
2568 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
2577 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
2582 v4l2_info(sd, "-----Signal status-----\n");
2583 cable_det = info->read_cable_det(sd);
2584 v4l2_info(sd, "Cable detected (+5V power) port A: %s, B: %s, C: %s, D: %s\n",
2589 v4l2_info(sd, "TMDS signal detected: %s\n",
2590 no_signal_tmds(sd) ? "false" : "true");
2591 v4l2_info(sd, "TMDS signal locked: %s\n",
2592 no_lock_tmds(sd) ? "false" : "true");
2593 v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true");
2594 v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true");
2595 v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true");
2596 v4l2_info(sd, "CP free run: %s\n",
2597 (in_free_run(sd)) ? "on" : "off");
2598 v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n",
2599 io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f,
2600 (io_read(sd, 0x01) & 0x70) >> 4);
2602 v4l2_info(sd, "-----Video Timings-----\n");
2603 if (read_stdi(sd, &stdi))
2604 v4l2_info(sd, "STDI: not locked\n");
2606 v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync\n",
2610 if (adv76xx_query_dv_timings(sd, &timings))
2611 v4l2_info(sd, "No video detected\n");
2613 v4l2_print_dv_timings(sd->name, "Detected format: ",
2615 v4l2_print_dv_timings(sd->name, "Configured format: ",
2618 if (no_signal(sd))
2621 v4l2_info(sd, "-----Color space-----\n");
2622 v4l2_info(sd, "RGB quantization range ctrl: %s\n",
2624 v4l2_info(sd, "Input color space: %s\n",
2626 v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n",
2631 v4l2_info(sd, "Color space conversion: %s\n",
2632 csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]);
2634 if (!is_digital_input(sd))
2637 v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D");
2638 v4l2_info(sd, "Digital video port selected: %c\n",
2639 (hdmi_read(sd, 0x00) & 0x03) + 'A');
2640 v4l2_info(sd, "HDCP encrypted content: %s\n",
2641 (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false");
2642 v4l2_info(sd, "HDCP keys read: %s%s\n",
2643 (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no",
2644 (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : "");
2645 if (is_hdmi(sd)) {
2646 bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01;
2647 bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01;
2648 bool audio_mute = io_read(sd, 0x65) & 0x40;
2650 v4l2_info(sd, "Audio: pll %s, samples %s, %s\n",
2655 v4l2_info(sd, "Audio format: %s\n",
2656 (hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo");
2658 v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) +
2659 (hdmi_read(sd, 0x5c) << 8) +
2660 (hdmi_read(sd, 0x5d) & 0xf0));
2661 v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) +
2662 (hdmi_read(sd, 0x5e) << 8) +
2663 hdmi_read(sd, 0x5f));
2664 v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off");
2666 v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]);
2667 v4l2_info(sd, "HDMI colorspace: %s\n", hdmi_color_space_txt[hdmi_read(sd, 0x53) & 0xf]);
2669 adv76xx_log_infoframes(sd);
2675 static int adv76xx_subscribe_event(struct v4l2_subdev *sd,
2681 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
2683 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
2689 static int adv76xx_registered(struct v4l2_subdev *sd)
2691 struct adv76xx_state *state = to_state(sd);
2692 struct i2c_client *client = v4l2_get_subdevdata(sd);
2701 static void adv76xx_unregistered(struct v4l2_subdev *sd)
2703 struct adv76xx_state *state = to_state(sd);
2814 static int adv76xx_core_init(struct v4l2_subdev *sd)
2816 struct adv76xx_state *state = to_state(sd);
2820 hdmi_write(sd, 0x48,
2824 disable_input(sd);
2829 select_input(sd);
2830 enable_input(sd);
2834 io_write(sd, 0x0c, 0x42); /* Power up part and power down VDP */
2835 io_write(sd, 0x0b, 0x44); /* Power down ESDP block */
2836 cp_write(sd, 0xcf, 0x01); /* Power down macrovision */
2841 io_write_clr_set(sd, 0x20, 0xc0, 0);
2847 hdmi_write_clr_set(sd, 0x6c, 0xf6, 0x26);
2851 io_write_clr_set(sd, 0x02, 0x0f, pdata->alt_gamma << 3);
2852 io_write_clr_set(sd, 0x05, 0x0e, pdata->blank_data << 3 |
2857 cp_write(sd, 0x69, 0x30); /* Enable CP CSC */
2860 io_write(sd, 0x06, 0xa0 | pdata->inv_vs_pol << 2 |
2864 io_write(sd, 0x14, 0x40 | pdata->dr_str_data << 4 |
2868 cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */
2869 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */
2870 cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold -
2872 cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold -
2874 cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution
2878 hdmi_write_clr_set(sd, 0x15, 0x03, 0x03); /* Mute on FIFO over-/underflow [REF_01, c. 1.2.18] */
2879 hdmi_write_clr_set(sd, 0x1a, 0x0e, 0x08); /* Wait 1 s before unmute */
2880 hdmi_write_clr_set(sd, 0x68, 0x06, 0x06); /* FIFO reset on over-/underflow [REF_01, c. 1.2.19] */
2883 afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */
2886 afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */
2887 io_write_clr_set(sd, 0x30, 1 << 4, pdata->output_bus_lsb_to_msb << 4);
2891 io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */
2892 io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */
2893 io_write(sd, 0x6e, info->fmt_change_digital_mask); /* Enable V_LOCKED and DE_REGEN_LCK interrupts */
2894 io_write(sd, 0x73, info->cable_det_mask); /* Enable cable detection (+5v) interrupts */
2895 info->setup_irqs(sd);
2897 return v4l2_ctrl_handler_setup(sd->ctrl_handler);
2900 static void adv7604_setup_irqs(struct v4l2_subdev *sd)
2902 io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */
2905 static void adv7611_setup_irqs(struct v4l2_subdev *sd)
2907 io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */
2910 static void adv7612_setup_irqs(struct v4l2_subdev *sd)
2912 io_write(sd, 0x41, 0xd0); /* disable INT2 */
2923 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd,
2926 struct i2c_client *client = v4l2_get_subdevdata(sd);
2927 struct adv76xx_state *state = to_state(sd);
2941 io_write(sd, io_reg, new_client->addr << 1);
3415 struct v4l2_subdev *sd;
3478 sd = &state->sd;
3479 v4l2_i2c_subdev_init(sd, client, &adv76xx_ops);
3480 snprintf(sd->name, sizeof(sd->name), "%s %d-%04x",
3483 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
3484 sd->internal_ops = &adv76xx_int_ops;
3490 v4l2_err(sd, "Error configuring IO regmap region\n");
3503 v4l2_err(sd, "Error %d reading IO Regmap\n", err);
3507 v4l2_err(sd, "not an ADV7604 on address 0x%x\n",
3518 v4l2_err(sd, "Error %d reading IO Regmap\n", err);
3526 v4l2_err(sd, "Error %d reading IO Regmap\n", err);
3532 v4l2_err(sd, "not an %s on address 0x%x\n",
3575 sd->ctrl_handler = hdl;
3580 if (adv76xx_s_detect_tx_5v_ctrl(sd)) {
3591 dummy_client = adv76xx_dummy_client(sd, i);
3594 v4l2_err(sd, "failed to create i2c client %u\n", i);
3609 sd->entity.function = MEDIA_ENT_F_DV_DECODER;
3611 err = media_entity_pads_init(&sd->entity, state->source_pad + 1,
3621 err = adv76xx_core_init(sd);
3644 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
3647 err = v4l2_async_register_subdev(sd);
3654 media_entity_cleanup(&sd->entity);
3668 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3669 struct adv76xx_state *state = to_state(sd);
3672 io_write(sd, 0x40, 0);
3673 io_write(sd, 0x41, 0);
3674 io_write(sd, 0x46, 0);
3675 io_write(sd, 0x6e, 0);
3676 io_write(sd, 0x73, 0);
3679 v4l2_async_unregister_subdev(sd);
3680 media_entity_cleanup(&sd->entity);
3681 adv76xx_unregister_clients(to_state(sd));
3682 v4l2_ctrl_handler_free(sd->ctrl_handler);