Lines Matching refs:edid
186 u8 edid[ADV76XX_MAX_EDID_BLOCKS * 128];
189 } edid;
546 adv76xx_set_hpd(state, state->edid.present);
2275 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
2280 memset(edid->reserved, 0, sizeof(edid->reserved));
2282 switch (edid->pad) {
2287 if (state->edid.present & (1 << edid->pad))
2288 data = state->edid.edid;
2294 if (edid->start_block == 0 && edid->blocks == 0) {
2295 edid->blocks = data ? state->edid.blocks : 0;
2302 if (edid->start_block >= state->edid.blocks)
2305 if (edid->start_block + edid->blocks > state->edid.blocks)
2306 edid->blocks = state->edid.blocks - edid->start_block;
2308 memcpy(edid->edid, data + edid->start_block * 128, edid->blocks * 128);
2313 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
2322 memset(edid->reserved, 0, sizeof(edid->reserved));
2324 if (edid->pad > ADV7604_PAD_HDMI_PORT_D)
2326 if (edid->start_block != 0)
2328 if (edid->blocks == 0) {
2330 state->edid.present &= ~(1 << edid->pad);
2331 adv76xx_set_hpd(state, state->edid.present);
2332 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);
2338 if (!state->edid.present) {
2339 state->edid.blocks = 0;
2343 v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n",
2344 __func__, edid->pad, state->edid.present);
2347 if (edid->blocks > ADV76XX_MAX_EDID_BLOCKS) {
2348 edid->blocks = ADV76XX_MAX_EDID_BLOCKS;
2352 pa = v4l2_get_edid_phys_addr(edid->edid, edid->blocks * 128, &spa_loc);
2363 pa = (edid->edid[spa_loc] << 8) | edid->edid[spa_loc + 1];
2366 v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n",
2367 __func__, edid->pad, state->edid.present);
2374 switch (edid->pad) {
2403 edid->edid[spa_loc] = state->spa_port_a[0];
2404 edid->edid[spa_loc + 1] = state->spa_port_a[1];
2406 memcpy(state->edid.edid, edid->edid, 128 * edid->blocks);
2407 state->edid.blocks = edid->blocks;
2408 state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15],
2409 edid->edid[0x16]);
2410 state->edid.present |= 1 << edid->pad;
2414 err = edid_write_block(sd, 128 * min(edid->blocks, 2U), state->edid.edid);
2416 v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad);
2419 if (edid->blocks > 2) {
2423 err = edid_write_block(sd, 128 * (edid->blocks - 2),
2424 state->edid.edid + 256);
2426 v4l2_err(sd, "error %d writing edid pad %d\n",
2427 err, edid->pad);
2434 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);
2437 if (rep_read(sd, info->edid_status_reg) & state->edid.present)
2442 v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present);
2807 [ADV76XX_PAGE_EDID] = { "edid", 0x36 },
3318 .name = "edid",