Lines Matching defs:cec_clk
1725 u32 cec_clk = state->pdata.cec_clk;
1748 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1758 if (cec_clk % 750000 != 0)
1759 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1760 __func__, cec_clk);
1762 ratio = (cec_clk / 750000) - 1;
1855 if (state->pdata.cec_clk < 3000000 ||
1856 state->pdata.cec_clk > 100000000) {
1857 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1858 __func__, state->pdata.cec_clk);
1859 state->pdata.cec_clk = 0;
1862 if (state->pdata.cec_clk) {