Lines Matching defs:adv7511_rd
187 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
213 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
274 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
279 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
432 reg->val = adv7511_rd(sd, reg->reg & 0xff);
500 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
519 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
575 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
576 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
580 (adv7511_rd(sd, 0xaf) & 0x02) ?
582 (adv7511_rd(sd, 0xa1) & 0x3c) ?
585 states[adv7511_rd(sd, 0xc8) & 0xf],
586 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
587 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
588 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
589 if (adv7511_rd(sd, 0xaf) & 0x02) {
591 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
592 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
593 adv7511_rd(sd, 0x02) << 8 |
594 adv7511_rd(sd, 0x03);
595 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
596 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
600 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
601 adv7511_rd(sd, 0x08) << 8 |
602 adv7511_rd(sd, 0x09);
604 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
605 adv7511_rd(sd, 0x05) << 8 |
606 adv7511_rd(sd, 0x06);
662 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
901 irqs_rd = adv7511_rd(sd, 0x94);
919 irq_status = adv7511_rd(sd, 0x96);
920 cec_irq = adv7511_rd(sd, 0x97);
1447 ed.segment = adv7511_rd(sd, 0xc4);
1543 u8 status = adv7511_rd(sd, 0x42);
1626 u8 edidRdy = adv7511_rd(sd, 0xc5);
1635 int segment = adv7511_rd(sd, 0xc4);
1836 state->chip_revision = adv7511_rd(sd, 0x0);
1837 chip_id[0] = adv7511_rd(sd, 0xf5);
1838 chip_id[1] = adv7511_rd(sd, 0xf6);