Lines Matching refs:state
115 static bool adv748x_hdmi_has_signal(struct adv748x_state *state)
120 val = hdmi_read(state, ADV748X_HDMI_LW1);
125 static int adv748x_hdmi_read_pixelclock(struct adv748x_state *state)
129 a = hdmi_read(state, ADV748X_HDMI_TMDS_1);
130 b = hdmi_read(state, ADV748X_HDMI_TMDS_2);
152 static void adv748x_hdmi_set_de_timings(struct adv748x_state *state, int shift)
162 cp_write(state, ADV748X_CP_DE_POS_HIGH, high);
163 cp_write(state, ADV748X_CP_DE_POS_END_LOW, low);
167 cp_write(state, ADV748X_CP_DE_POS_HIGH, high);
168 cp_write(state, ADV748X_CP_DE_POS_START_LOW, low);
171 static int adv748x_hdmi_set_video_timings(struct adv748x_state *state,
195 adv748x_hdmi_set_de_timings(state, -40);
199 adv748x_hdmi_set_de_timings(state, -44);
202 adv748x_hdmi_set_de_timings(state, 0);
206 io_write(state, ADV748X_IO_VID_STD, stds[i].vid_std);
207 io_clrset(state, ADV748X_IO_DATAPATH, ADV748X_IO_DATAPATH_VFREQ_M,
221 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
236 mutex_lock(&state->mutex);
238 ret = adv748x_hdmi_set_video_timings(state, timings);
244 cp_clrset(state, ADV748X_CP_VID_ADJ_2, ADV748X_CP_VID_ADJ_2_INTERLACED,
248 mutex_unlock(&state->mutex);
253 mutex_unlock(&state->mutex);
261 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
263 mutex_lock(&state->mutex);
267 mutex_unlock(&state->mutex);
276 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
291 if (cp_read(state, ADV748X_CP_PAT_GEN) & ADV748X_CP_PAT_GEN_EN) {
296 if (!adv748x_hdmi_has_signal(state))
299 pixelclock = adv748x_hdmi_read_pixelclock(state);
306 bt->interlaced = hdmi_read(state, ADV748X_HDMI_F1H1) &
309 bt->width = hdmi_read16(state, ADV748X_HDMI_LW1,
311 bt->height = hdmi_read16(state, ADV748X_HDMI_F0H1,
313 bt->hfrontporch = hdmi_read16(state, ADV748X_HDMI_HFRONT_PORCH,
315 bt->hsync = hdmi_read16(state, ADV748X_HDMI_HSYNC_WIDTH,
317 bt->hbackporch = hdmi_read16(state, ADV748X_HDMI_HBACK_PORCH,
319 bt->vfrontporch = hdmi_read16(state, ADV748X_HDMI_VFRONT_PORCH,
321 bt->vsync = hdmi_read16(state, ADV748X_HDMI_VSYNC_WIDTH,
323 bt->vbackporch = hdmi_read16(state, ADV748X_HDMI_VBACK_PORCH,
326 polarity = hdmi_read(state, 0x05);
331 bt->height += hdmi_read16(state, 0x0b, 0x1fff);
332 bt->il_vfrontporch = hdmi_read16(state, 0x2c, 0x3fff) / 2;
333 bt->il_vsync = hdmi_read16(state, 0x30, 0x3fff) / 2;
334 bt->il_vbackporch = hdmi_read16(state, 0x34, 0x3fff) / 2;
342 * should be figured out and stored to state.
352 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
354 mutex_lock(&state->mutex);
356 *status = adv748x_hdmi_has_signal(state) ? 0 : V4L2_IN_ST_NO_SIGNAL;
358 mutex_unlock(&state->mutex);
366 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
369 mutex_lock(&state->mutex);
375 if (adv748x_hdmi_has_signal(state))
376 adv_dbg(state, "Detected HDMI signal\n");
378 adv_dbg(state, "Couldn't detect HDMI video signal\n");
381 mutex_unlock(&state->mutex);
502 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
507 adv_dbg(state, "%s: write EDID block (%d byte)\n",
515 err = adv748x_write_block(state, ADV748X_PAGE_EDID,
526 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
543 repeater_write(state, ADV748X_REPEATER_EDID_SZ,
546 repeater_write(state, ADV748X_REPEATER_EDID_CTL, 0);
570 repeater_write(state, ADV748X_REPEATER_EDID_SZ,
573 repeater_write(state, ADV748X_REPEATER_EDID_CTL,
643 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
648 ret = cp_clrset(state, ADV748X_CP_VID_ADJ,
656 ret = cp_write(state, ADV748X_CP_BRI, ctrl->val);
659 ret = cp_write(state, ADV748X_CP_HUE, ctrl->val);
662 ret = cp_write(state, ADV748X_CP_CON, ctrl->val);
665 ret = cp_write(state, ADV748X_CP_SAT, ctrl->val);
676 ret = cp_write(state, ADV748X_CP_PAT_GEN, pattern);
692 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
697 hdmi->ctrl_hdl.lock = &state->mutex;
733 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
743 adv748x_subdev_init(&hdmi->sd, state, &adv748x_ops_hdmi,