Lines Matching refs:tx
17 int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc)
19 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT);
25 * @tx: CSI2 private entity
28 * @src_pad: Pad number of source to link to this @tx
34 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx,
49 &tx->sd.entity, ADV748X_CSI2_SINK,
55 tx->src = src;
70 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
71 struct adv748x_state *state = tx->state;
74 adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB",
84 ret = adv748x_csi2_register_link(tx, sd->v4l2_dev,
87 is_txb(tx));
92 if (is_txb(tx))
93 state->afe.tx = tx;
97 if (is_txb(tx) || !is_hdmi_enabled(state))
100 ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd,
106 state->hdmi.tx = tx;
121 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
124 src = adv748x_get_remote_sd(&tx->pads[ADV748X_CSI2_SINK]);
147 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
152 return &tx->format;
159 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
160 struct adv748x_state *state = tx->state;
181 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
182 struct adv748x_state *state = tx->state;
219 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
225 config->bus.mipi_csi2.num_data_lanes = tx->active_lanes;
251 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
253 if (!tx->pixel_rate)
256 return v4l2_ctrl_s_ctrl_int64(tx->pixel_rate, rate);
273 static int adv748x_csi2_init_controls(struct adv748x_csi2 *tx)
276 v4l2_ctrl_handler_init(&tx->ctrl_hdl, 1);
278 tx->pixel_rate = v4l2_ctrl_new_std(&tx->ctrl_hdl,
283 tx->sd.ctrl_handler = &tx->ctrl_hdl;
284 if (tx->ctrl_hdl.error) {
285 v4l2_ctrl_handler_free(&tx->ctrl_hdl);
286 return tx->ctrl_hdl.error;
289 return v4l2_ctrl_handler_setup(&tx->ctrl_hdl);
292 int adv748x_csi2_init(struct adv748x_state *state, struct adv748x_csi2 *tx)
296 if (!is_tx_enabled(tx))
299 adv748x_subdev_init(&tx->sd, state, &adv748x_csi2_ops,
301 is_txa(tx) ? "txa" : "txb");
304 tx->sd.internal_ops = &adv748x_csi2_internal_ops;
306 tx->pads[ADV748X_CSI2_SINK].flags = MEDIA_PAD_FL_SINK;
307 tx->pads[ADV748X_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
309 ret = media_entity_pads_init(&tx->sd.entity, ADV748X_CSI2_NR_PADS,
310 tx->pads);
314 ret = v4l2_async_subdev_endpoint_add(&tx->sd,
315 of_fwnode_handle(state->endpoints[tx->port]));
319 ret = adv748x_csi2_init_controls(tx);
323 ret = v4l2_async_register_subdev(&tx->sd);
330 v4l2_ctrl_handler_free(&tx->ctrl_hdl);
332 v4l2_subdev_cleanup(&tx->sd);
334 media_entity_cleanup(&tx->sd.entity);
339 void adv748x_csi2_cleanup(struct adv748x_csi2 *tx)
341 if (!is_tx_enabled(tx))
344 v4l2_async_unregister_subdev(&tx->sd);
345 media_entity_cleanup(&tx->sd.entity);
346 v4l2_ctrl_handler_free(&tx->ctrl_hdl);
347 v4l2_subdev_cleanup(&tx->sd);