Lines Matching refs:reg

25 	u8 reg[11];
72 	/* Gain *100dB // reg */
108 	/* Gain *100dB // reg */
168 	/* Gain *100dB // reg */
227 	/* Gain *100dB // reg */
321 static int write_regs(struct stv *state, int reg, int len)
325 	memcpy(&d[1], &state->reg[reg], len);
326 	d[0] = reg;
330 static int write_reg(struct stv *state, u8 reg, u8 val)
332 	u8 d[2] = {reg, val};
337 static int read_reg(struct stv *state, u8 reg, u8 *val)
339 	return i2c_read(state->i2c, state->adr, &reg, 1, val, 1);
372 	state->reg[0] = 0x08;
373 	state->reg[1] = 0x41;
374 	state->reg[2] = 0x8f;
375 	state->reg[3] = 0x00;
376 	state->reg[4] = 0xce;
377 	state->reg[5] = 0x54;
378 	state->reg[6] = 0x55;
379 	state->reg[7] = 0x45;
380 	state->reg[8] = 0x46;
381 	state->reg[9] = 0xbd;
382 	state->reg[10] = 0x11;
387 		state->reg[0x00] |= (clkdiv & 0x03);
389 		state->reg[0x03] |= (agcmode << 5);
391 			state->reg[0x01] |= 0x30;
394 		state->reg[0x01] = (state->reg[0x01] & ~0x30) | (bbmode << 4);
396 		state->reg[0x03] |= agcref;
398 		state->reg[0x02] = (state->reg[0x02] & ~0x1F) | agcset | 0x40;
424 	if ((state->reg[0x08] & ~0xFC) == ((index - 6) << 2))
427 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
428 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x08;
480 	state->reg[0x02] |= 0x80; /* LNA IIP3 Mode */
482 	state->reg[0x03] = (state->reg[0x03] & ~0x80) | (psel << 7);
483 	state->reg[0x04] = (div & 0xFF);
484 	state->reg[0x05] = (((div >> 8) & 0x01) | ((frac & 0x7F) << 1)) & 0xff;
485 	state->reg[0x06] = ((frac >> 7) & 0xFF);
486 	state->reg[0x07] = (state->reg[0x07] & ~0x07) | ((frac >> 15) & 0x07);
487 	state->reg[0x07] = (state->reg[0x07] & ~0xE0) | (icp << 5);
489 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
491 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x0C;
500 		state->reg[0x02] &= ~0x80; /* LNA NF Mode */
571 	if ((state->reg[0x03] & 0x60) == 0) {
573 		u8 reg = 0;
579 			write_reg(state, 0x02, state->reg[0x02] | 0x20);
580 			read_reg(state, 2, &reg);
581 			if (reg & 0x20)
582 				read_reg(state, 2, &reg);
587 		if ((state->reg[0x02] & 0x80) == 0)
591 					    reg & 0x1F);
596 					    reg & 0x1F);
604 		if ((state->reg[0x02] & 0x80) == 0) {
625 	gain +=  (s32)((state->reg[0x01] & 0xC0) >> 6) * 600 - 1300;