Lines Matching defs:s5h1411_writereg
330 static int s5h1411_writereg(struct s5h1411_state *state,
371 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 0);
372 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 1);
384 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x10d5);
385 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x5342);
386 s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x10d9);
389 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1225);
390 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x1e96);
391 s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x1225);
394 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x14bc);
395 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0xb53e);
396 s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x14bd);
404 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);
405 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x3655);
406 s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x1be4);
442 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbe, val);
457 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x24, val);
471 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbd, val);
491 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x71);
492 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x00);
493 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0xf1);
500 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x0171);
501 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x0001);
502 s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x16, 0x1101);
503 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0x00f0);
524 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1);
526 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 0);
539 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0,
542 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0, val);
552 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 1);
554 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 0);
572 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf3, 0);
619 s5h1411_writereg(state, init_tab[i].addr,
892 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1);