Lines Matching defs:time
567 /* always leave the VBG voltage on - it consumes almost nothing but takes a long time to start */
788 /* wait AGC rough lock time */
803 agc_split = (u8)dib7000m_read_word(state, 392); /* store the split value for the next time */
818 /* wait AGC accurate lock time */
822 // wait only AGC rough lock time
991 ret |= dib7000m_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time
992 ret |= dib7000m_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time
994 ret |= dib7000m_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time
995 ret |= dib7000m_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time
997 ret |= dib7000m_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time
998 ret |= dib7000m_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time
1094 // we achieved a lock - it's time to update the timf freq
1220 int time, ret;
1232 time = dib7000m_agc_startup(fe);
1233 if (time != -1)
1234 msleep(time);
1235 } while (time != -1);