Lines Matching refs:state
52 * raid5 cache state machine
127 * IO_UNIT_STRIPE_END state (eg, reclaim
130 * state) */
224 int state;
241 /* r5l_io_unit state */
284 enum r5l_io_unit_state state)
286 if (WARN_ON(io->state >= state))
288 io->state = state;
318 !test_bit(STRIPE_DEGRADED, &sh->state),
456 WARN_ON(!test_bit(STRIPE_R5C_CACHING, &sh->state));
457 clear_bit(STRIPE_R5C_CACHING, &sh->state);
459 if (!test_and_set_bit(STRIPE_PREREAD_ACTIVE, &sh->state))
472 clear_bit(STRIPE_LOG_TRAPPED, &sh->state);
497 BUG_ON(test_bit(STRIPE_R5C_CACHING, &sh->state));
505 } else if (test_bit(STRIPE_R5C_CACHING, &sh->state)) {
522 set_bit(STRIPE_HANDLE, &sh->state);
535 if (io->state < IO_UNIT_IO_END)
551 if (io->state < IO_UNIT_IO_END)
778 io->state = IO_UNIT_RUNNING;
921 if (test_and_clear_bit(STRIPE_R5C_PREFLUSH, &sh->state))
1005 test_bit(STRIPE_SYNCING, &sh->state)) {
1007 clear_bit(STRIPE_LOG_TRAPPED, &sh->state);
1011 WARN_ON(test_bit(STRIPE_R5C_CACHING, &sh->state));
1022 if (test_bit(STRIPE_LOG_TRAPPED, &sh->state))
1032 set_bit(STRIPE_LOG_TRAPPED, &sh->state);
1034 * The stripe must enter state machine again to finish the write, so
1037 clear_bit(STRIPE_DELAYED, &sh->state);
1140 set_bit(STRIPE_HANDLE, &sh->state);
1192 set_bit(STRIPE_HANDLE, &sh->state);
1206 if (io->state < IO_UNIT_STRIPE_END)
1366 BUG_ON(!test_bit(STRIPE_R5C_CACHING, &sh->state));
1367 BUG_ON(test_bit(STRIPE_HANDLE, &sh->state));
1373 BUG_ON(test_bit(STRIPE_ON_RELEASE_LIST, &sh->state));
1379 set_bit(STRIPE_HANDLE, &sh->state);
1383 if (test_bit(STRIPE_R5C_PARTIAL_STRIPE, &sh->state))
1472 * state of the stripe_cache state machine. In this
1479 !test_bit(STRIPE_HANDLE, &sh->state) &&
1822 set_bit(STRIPE_R5C_CACHING, &sh->state);
1848 clear_bit(STRIPE_R5C_CACHING, &sh->state);
1855 sh->state = 0;
1968 if (!test_bit(STRIPE_R5C_CACHING, &sh->state)) {
2115 WARN_ON(test_bit(STRIPE_R5C_CACHING, &sh->state));
2176 if (!test_bit(STRIPE_R5C_CACHING, &sh->state) &&
2202 * the stripe cache state machine.
2226 * (STRIPE_R5C_CACHING == 1), we load them to stripe cache state machine.
2268 WARN_ON(!test_bit(STRIPE_R5C_CACHING, &sh->state));
2319 * However, it is not safe to start the state machine yet, because data only
2342 * Then we can safely start the state machine. If failure happens from this
2369 WARN_ON(!test_bit(STRIPE_R5C_CACHING, &sh->state));
2438 set_bit(STRIPE_HANDLE, &sh->state);
2649 if (!test_bit(STRIPE_R5C_CACHING, &sh->state)) {
2667 set_bit(STRIPE_R5C_CACHING, &sh->state);
2678 if (s->failed || test_bit(STRIPE_SYNCING, &sh->state)) {
2694 if (!test_bit(STRIPE_R5C_PARTIAL_STRIPE, &sh->state) &&
2695 !test_bit(STRIPE_R5C_FULL_STRIPE, &sh->state)) {
2727 set_bit(STRIPE_R5C_PARTIAL_STRIPE, &sh->state);
2748 set_bit(STRIPE_LOG_TRAPPED, &sh->state);
2815 WARN_ON(test_bit(STRIPE_R5C_CACHING, &sh->state));
2833 if (test_and_clear_bit(STRIPE_FULL_WRITE, &sh->state))
2849 if (test_bit(STRIPE_R5C_PARTIAL_STRIPE, &sh->state) ||
2850 test_bit(STRIPE_R5C_FULL_STRIPE, &sh->state)) {
2868 if (test_and_clear_bit(STRIPE_R5C_PARTIAL_STRIPE, &sh->state)) {
2874 if (test_and_clear_bit(STRIPE_R5C_FULL_STRIPE, &sh->state)) {
2882 if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state))
2883 set_bit(STRIPE_HANDLE, &sh->state);
2910 * The stripe must enter state machine again to call endio, so
2913 clear_bit(STRIPE_DELAYED, &sh->state);