Lines Matching defs:isar
20 #include "isar.h"
37 waitforHIA(struct isar_hw *isar, int timeout)
40 u8 val = isar->read_reg(isar->hw, ISAR_HIA);
45 val = isar->read_reg(isar->hw, ISAR_HIA);
47 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
53 * if msg is NULL use isar->buf
56 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
58 if (!waitforHIA(isar, 1000))
61 isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
62 isar->write_reg(isar->hw, ISAR_CTRL_L, len);
63 isar->write_reg(isar->hw, ISAR_WADR, 0);
65 msg = isar->buf;
67 isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
68 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
73 isar->log, 256, 1);
74 pr_debug("%s: %s %02x: %s\n", isar->name,
75 __func__, l, isar->log);
80 isar->write_reg(isar->hw, ISAR_HIS, his);
81 waitforHIA(isar, 1000);
87 * if msg is NULL use isar->buf
90 rcv_mbox(struct isar_hw *isar, u8 *msg)
93 msg = isar->buf;
94 isar->write_reg(isar->hw, ISAR_RADR, 0);
95 if (msg && isar->clsb) {
96 isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
97 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
100 while (l < (int)isar->clsb) {
101 hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
102 1, isar->log, 256, 1);
103 pr_debug("%s: %s %02x: %s\n", isar->name,
104 __func__, l, isar->log);
109 isar->write_reg(isar->hw, ISAR_IIA, 0);
113 get_irq_infos(struct isar_hw *isar)
115 isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
116 isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
117 isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
118 pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
119 isar->iis, isar->cmsb, isar->clsb);
128 poll_mbox(struct isar_hw *isar, int maxdelay)
133 irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
139 get_irq_infos(isar);
140 rcv_mbox(isar, NULL);
143 isar->name, isar->clsb, maxdelay - t);
148 ISARVersion(struct isar_hw *isar)
153 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
154 isar->buf[0] = ISAR_MSG_HWVER;
155 isar->buf[1] = 0;
156 isar->buf[2] = 1;
157 if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
159 if (!poll_mbox(isar, 1000))
161 if (isar->iis == ISAR_IIS_VNR) {
162 if (isar->clsb == 1) {
163 ver = isar->buf[0] & 0xf;
172 load_firmware(struct isar_hw *isar, const u8 *buf, int size)
174 u32 saved_debug = isar->ch[0].bch.debug;
187 if (1 != isar->version) {
189 isar->name, isar->version);
193 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
195 isar->name, size / 2, size);
199 spin_lock_irqsave(isar->hwlock, flags);
200 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
201 spin_unlock_irqrestore(isar->hwlock, flags);
212 isar->name, size, cnt + left);
216 spin_lock_irqsave(isar->hwlock, flags);
217 if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
223 if (!poll_mbox(isar, 1000)) {
228 spin_unlock_irqrestore(isar->hwlock, flags);
229 if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
231 isar->iis, isar->cmsb, isar->clsb);
241 mp = isar->buf;
248 pr_debug("%s: load %3d words at %04x\n", isar->name,
257 spin_lock_irqsave(isar->hwlock, flags);
258 if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
263 if (!poll_mbox(isar, 1000)) {
268 spin_unlock_irqrestore(isar->hwlock, flags);
269 if ((isar->iis != ISAR_IIS_FIRM) ||
270 isar->cmsb || isar->clsb) {
272 isar->iis, isar->cmsb, isar->clsb);
278 isar->name, blk_head.len);
280 isar->ch[0].bch.debug = saved_debug;
285 isar->buf[0] = 0xff;
286 isar->buf[1] = 0xfe;
287 isar->bstat = 0;
288 spin_lock_irqsave(isar->hwlock, flags);
289 if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
294 if (!poll_mbox(isar, 1000)) {
299 if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
301 isar->iis, isar->cmsb, isar->clsb);
305 pr_debug("%s: ISAR start dsp success\n", isar->name);
309 isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
310 spin_unlock_irqrestore(isar->hwlock, flags);
312 while ((!isar->bstat) && cnt) {
322 isar->name, isar->bstat);
327 isar->iis = 0;
328 spin_lock_irqsave(isar->hwlock, flags);
329 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
334 spin_unlock_irqrestore(isar->hwlock, flags);
336 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
346 if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
347 && (isar->buf[0] == 0))
348 pr_debug("%s: ISAR selftest OK\n", isar->name);
351 isar->cmsb, isar->clsb, isar->buf[0]);
355 spin_lock_irqsave(isar->hwlock, flags);
356 isar->iis = 0;
357 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
362 spin_unlock_irqrestore(isar->hwlock, flags);
364 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
374 if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
376 isar->name, isar->buf[0]);
379 " cnt(%d)\n", isar->name, isar->cmsb,
380 isar->clsb, cnt);
385 spin_lock_irqsave(isar->hwlock, flags);
386 isar_setup(isar);
387 spin_unlock_irqrestore(isar->hwlock, flags);
390 spin_lock_irqsave(isar->hwlock, flags);
392 isar->ch[0].bch.debug = saved_debug;
395 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
396 spin_unlock_irqrestore(isar->hwlock, flags);
659 sel_bch_isar(struct isar_hw *isar, u8 dpath)
661 struct isar_ch *base = &isar->ch[0];
719 check_send(struct isar_hw *isar, u8 rdm)
723 pr_debug("%s: rdm %x\n", isar->name, rdm);
725 ch = sel_bch_isar(isar, 1);
735 ch = sel_bch_isar(isar, 2);
1036 mISDNisar_irq(struct isar_hw *isar)
1040 get_irq_infos(isar);
1041 switch (isar->iis & ISAR_IIS_MSCMSD) {
1043 ch = sel_bch_isar(isar, isar->iis >> 6);
1048 isar->name, isar->iis, isar->cmsb,
1049 isar->clsb);
1050 isar->write_reg(isar->hw, ISAR_IIA, 0);
1054 isar->write_reg(isar->hw, ISAR_IIA, 0);
1055 isar->bstat |= isar->cmsb;
1056 check_send(isar, isar->cmsb);
1060 ch = sel_bch_isar(isar, isar->iis >> 6);
1062 if (isar->cmsb == BSTEV_TBO)
1064 if (isar->cmsb == BSTEV_RBO)
1069 isar->name, isar->iis >> 6, isar->cmsb);
1070 isar->write_reg(isar->hw, ISAR_IIA, 0);
1073 ch = sel_bch_isar(isar, isar->iis >> 6);
1075 rcv_mbox(isar, NULL);
1077 isar_pump_statev_modem(ch, isar->cmsb);
1079 isar_pump_statev_fax(ch, isar->cmsb);
1082 tt = isar->cmsb | 0x30;
1095 isar->name, ch->bch.state,
1096 isar->cmsb);
1099 isar->name, isar->iis, isar->cmsb,
1100 isar->clsb);
1101 isar->write_reg(isar->hw, ISAR_IIA, 0);
1105 ch = sel_bch_isar(isar, isar->iis >> 6);
1107 rcv_mbox(isar, NULL);
1111 isar->name, isar->iis, isar->cmsb,
1112 isar->clsb);
1113 isar->write_reg(isar->hw, ISAR_IIA, 0);
1119 rcv_mbox(isar, NULL);
1122 rcv_mbox(isar, NULL);
1123 pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
1126 rcv_mbox(isar, NULL);
1128 isar->name, isar->iis, isar->cmsb, isar->clsb);
1447 isar_setup(struct isar_hw *isar)
1456 send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1458 isar->ch[i].mml = msg;
1459 isar->ch[i].bch.state = 0;
1460 isar->ch[i].dpath = i + 1;
1461 modeisar(&isar->ch[i], ISDN_P_NONE);
1536 pr_debug("%s: isar: new mod\n", ich->is->name);
1601 free_isar(struct isar_hw *isar)
1603 modeisar(&isar->ch[0], ISDN_P_NONE);
1604 modeisar(&isar->ch[1], ISDN_P_NONE);
1605 del_timer(&isar->ch[0].ftimer);
1606 del_timer(&isar->ch[1].ftimer);
1607 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1608 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1612 init_isar(struct isar_hw *isar)
1617 isar->version = ISARVersion(isar);
1618 if (isar->ch[0].bch.debug & DEBUG_HW)
1620 isar->name, isar->version, 3 - cnt);
1621 if (isar->version == 1)
1623 isar->ctrl(isar->hw, HW_RESET_REQ, 0);
1625 if (isar->version != 1)
1627 timer_setup(&isar->ch[0].ftimer, ftimer_handler, 0);
1628 test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1629 timer_setup(&isar->ch[1].ftimer, ftimer_handler, 0);
1630 test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1635 isar_open(struct isar_hw *isar, struct channel_req *rq)
1643 bch = &isar->ch[rq->adr.channel - 1].bch;
1652 mISDNisar_init(struct isar_hw *isar, void *hw)
1656 isar->hw = hw;
1658 isar->ch[i].bch.nr = i + 1;
1659 mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);
1660 isar->ch[i].bch.ch.nr = i + 1;
1661 isar->ch[i].bch.ch.send = &isar_l2l1;
1662 isar->ch[i].bch.ch.ctrl = isar_bctrl;
1663 isar->ch[i].bch.hw = hw;
1664 isar->ch[i].is = isar;
1667 isar->init = &init_isar;
1668 isar->release = &free_isar;
1669 isar->firmware = &load_firmware;
1670 isar->open = &isar_open;