Lines Matching defs:sp_intc
22 #define REG_INTR_TYPE (sp_intc.g0)
28 #define REG_INTR_CLEAR (sp_intc.g1)
58 #define ASSIGN_STATE(irq, idx, v) assign_bit(STATE_BIT(irq, idx), sp_intc.states, v)
59 #define TEST_STATE(irq, idx) test_bit(STATE_BIT(irq, idx), sp_intc.states)
77 } sp_intc;
90 raw_spin_lock_irqsave(&sp_intc.lock, flags);
97 raw_spin_unlock_irqrestore(&sp_intc.lock, flags);
180 generic_handle_domain_irq(sp_intc.domain, hwirq);
188 .name = "sp_intc",
227 sp_intc.g0 = of_iomap(node, 0);
228 if (!sp_intc.g0)
231 sp_intc.g1 = of_iomap(node, 1);
232 if (!sp_intc.g1) {
259 sp_intc.domain = irq_domain_add_linear(node, SP_INTC_NR_IRQS,
260 &sp_intc_dm_ops, &sp_intc);
261 if (!sp_intc.domain) {
266 raw_spin_lock_init(&sp_intc.lock);
271 iounmap(sp_intc.g1);
273 iounmap(sp_intc.g0);
278 IRQCHIP_DECLARE(sp_intc, "sunplus,sp7021-intc", sp_intc_init_dt);