Lines Matching refs:intc

118  * @intc: PRUSS interrupt controller pointer
122 struct pruss_intc *intc;
126 static inline u32 pruss_intc_read_reg(struct pruss_intc *intc, unsigned int reg)
128 return readl_relaxed(intc->base + reg);
131 static inline void pruss_intc_write_reg(struct pruss_intc *intc,
134 writel_relaxed(val, intc->base + reg);
137 static void pruss_intc_update_cmr(struct pruss_intc *intc, unsigned int evt,
145 val = pruss_intc_read_reg(intc, PRU_INTC_CMR(idx));
148 pruss_intc_write_reg(intc, PRU_INTC_CMR(idx), val);
150 dev_dbg(intc->dev, "SYSEV%u -> CH%d (CMR%d 0x%08x)\n", evt, ch,
151 idx, pruss_intc_read_reg(intc, PRU_INTC_CMR(idx)));
154 static void pruss_intc_update_hmr(struct pruss_intc *intc, u8 ch, u8 host)
161 val = pruss_intc_read_reg(intc, PRU_INTC_HMR(idx));
164 pruss_intc_write_reg(intc, PRU_INTC_HMR(idx), val);
166 dev_dbg(intc->dev, "CH%d -> HOST%d (HMR%d 0x%08x)\n", ch, host, idx,
167 pruss_intc_read_reg(intc, PRU_INTC_HMR(idx)));
172 * @intc: PRUSS interrupt controller pointer
178 static void pruss_intc_map(struct pruss_intc *intc, unsigned long hwirq)
180 struct device *dev = intc->dev;
184 mutex_lock(&intc->lock);
186 intc->event_channel[hwirq].ref_count++;
188 ch = intc->event_channel[hwirq].value;
189 host = intc->channel_host[ch].value;
191 pruss_intc_update_cmr(intc, hwirq, ch);
197 pruss_intc_write_reg(intc, PRU_INTC_ESR(reg_idx), val);
198 pruss_intc_write_reg(intc, PRU_INTC_SECR(reg_idx), val);
200 if (++intc->channel_host[ch].ref_count == 1) {
201 pruss_intc_update_hmr(intc, ch, host);
204 pruss_intc_write_reg(intc, PRU_INTC_HIEISR, host);
210 mutex_unlock(&intc->lock);
215 * @intc: PRUSS interrupt controller pointer
222 static void pruss_intc_unmap(struct pruss_intc *intc, unsigned long hwirq)
227 mutex_lock(&intc->lock);
229 ch = intc->event_channel[hwirq].value;
230 host = intc->channel_host[ch].value;
232 if (--intc->channel_host[ch].ref_count == 0) {
234 pruss_intc_write_reg(intc, PRU_INTC_HIDISR, host);
237 pruss_intc_update_hmr(intc, ch, 0);
240 intc->event_channel[hwirq].ref_count--;
245 pruss_intc_write_reg(intc, PRU_INTC_ECR(reg_idx), val);
247 pruss_intc_write_reg(intc, PRU_INTC_SECR(reg_idx), val);
250 pruss_intc_update_cmr(intc, hwirq, 0);
252 dev_dbg(intc->dev, "unmapped system_event = %lu channel = %d host = %d\n",
255 mutex_unlock(&intc->lock);
258 static void pruss_intc_init(struct pruss_intc *intc)
260 const struct pruss_intc_match_data *soc_config = intc->soc_config;
274 pruss_intc_write_reg(intc, PRU_INTC_SIPR(i), 0xffffffff);
275 pruss_intc_write_reg(intc, PRU_INTC_SITR(i), 0);
280 pruss_intc_write_reg(intc, PRU_INTC_CMR(i), 0);
284 pruss_intc_write_reg(intc, PRU_INTC_HMR(i), 0);
287 pruss_intc_write_reg(intc, PRU_INTC_GER, 1);
292 struct pruss_intc *intc = irq_data_get_irq_chip_data(data);
295 pruss_intc_write_reg(intc, PRU_INTC_SICR, hwirq);
300 struct pruss_intc *intc = irq_data_get_irq_chip_data(data);
303 pruss_intc_write_reg(intc, PRU_INTC_EICR, hwirq);
308 struct pruss_intc *intc = irq_data_get_irq_chip_data(data);
311 pruss_intc_write_reg(intc, PRU_INTC_EISR, hwirq);
331 struct pruss_intc *intc = irq_data_get_irq_chip_data(data);
340 srsr = pruss_intc_read_reg(intc, reg);
351 struct pruss_intc *intc = irq_data_get_irq_chip_data(data);
357 pruss_intc_write_reg(intc, PRU_INTC_SISR, data->hwirq);
359 pruss_intc_write_reg(intc, PRU_INTC_SICR, data->hwirq);
365 .name = "pruss-intc",
375 static int pruss_intc_validate_mapping(struct pruss_intc *intc, int event,
378 struct device *dev = intc->dev;
381 mutex_lock(&intc->lock);
384 if (intc->event_channel[event].ref_count > 0 &&
385 intc->event_channel[event].value != channel) {
387 event, channel, intc->event_channel[event].value);
393 if (intc->channel_host[channel].ref_count > 0 &&
394 intc->channel_host[channel].value != host) {
396 channel, host, intc->channel_host[channel].value);
401 intc->event_channel[event].value = channel;
402 intc->channel_host[channel].value = host;
405 mutex_unlock(&intc->lock);
414 struct pruss_intc *intc = d->host_data;
415 struct device *dev = intc->dev;
422 if (sys_event < 0 || sys_event >= intc->soc_config->num_system_events) {
428 if (channel < 0 || channel >= intc->soc_config->num_host_events) {
434 if (host < 0 || host >= intc->soc_config->num_host_events) {
440 ret = pruss_intc_validate_mapping(intc, sys_event, channel, host);
453 struct pruss_intc *intc = d->host_data;
455 pruss_intc_map(intc, hw);
457 irq_set_chip_data(virq, intc);
465 struct pruss_intc *intc = d->host_data;
470 pruss_intc_unmap(intc, hwirq);
484 struct pruss_intc *intc = host_irq_data->intc;
494 hipir = pruss_intc_read_reg(intc, PRU_INTC_HIPIR(host_irq));
499 err = generic_handle_domain_irq(intc->domain, hwirq);
506 pruss_intc_write_reg(intc, PRU_INTC_SICR, hwirq);
521 struct pruss_intc *intc;
532 intc = devm_kzalloc(dev, sizeof(*intc), GFP_KERNEL);
533 if (!intc)
536 intc->soc_config = data;
537 intc->dev = dev;
538 platform_set_drvdata(pdev, intc);
540 intc->base = devm_platform_ioremap_resource(pdev, 0);
541 if (IS_ERR(intc->base))
542 return PTR_ERR(intc->base);
554 pruss_intc_init(intc);
556 mutex_init(&intc->lock);
558 intc->domain = irq_domain_add_linear(dev->of_node, max_system_events,
559 &pruss_intc_irq_domain_ops, intc);
560 if (!intc->domain)
573 intc->irqs[i] = irq;
581 host_data->intc = intc;
592 if (intc->irqs[i])
593 irq_set_chained_handler_and_data(intc->irqs[i], NULL,
597 irq_domain_remove(intc->domain);
604 struct pruss_intc *intc = platform_get_drvdata(pdev);
605 u8 max_system_events = intc->soc_config->num_system_events;
610 if (intc->irqs[i])
611 irq_set_chained_handler_and_data(intc->irqs[i], NULL,
616 irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq));
618 irq_domain_remove(intc->domain);
635 .compatible = "ti,pruss-intc",
639 .compatible = "ti,icssg-intc",
648 .name = "pruss-intc",