Lines Matching defs:icu_data
62 static struct icu_chip_data icu_data[MAX_ICU_NR];
75 if (data == &icu_data[0]) {
99 if (data == &icu_data[0]) {
128 if (data == &icu_data[0]) {
158 if (irq == icu_data[i].cascade_irq) {
159 domain = icu_data[i].domain;
175 generic_handle_irq(icu_data[i].virq_base + n);
233 generic_handle_domain_irq(icu_data[0].domain, hwirq);
244 generic_handle_domain_irq(icu_data[0].domain, hwirq);
263 icu_data[0].virq_base = 0;
264 icu_data[0].domain = irq_domain_add_linear(node, nr_irqs,
266 &icu_data[0]);
268 ret = irq_create_mapping(icu_data[0].domain, irq);
274 icu_data[0].virq_base = ret;
276 icu_data[0].nr_irqs = nr_irqs;
279 if (icu_data[0].virq_base) {
281 irq_dispose_mapping(icu_data[0].virq_base + i);
283 irq_domain_remove(icu_data[0].domain);
297 icu_data[0].conf_enable = mmp_conf.conf_enable;
298 icu_data[0].conf_disable = mmp_conf.conf_disable;
299 icu_data[0].conf_mask = mmp_conf.conf_mask;
315 icu_data[0].conf_enable = mmp2_conf.conf_enable;
316 icu_data[0].conf_disable = mmp2_conf.conf_disable;
317 icu_data[0].conf_mask = mmp2_conf.conf_mask;
341 icu_data[0].conf_enable = mmp3_conf.conf_enable;
342 icu_data[0].conf_disable = mmp3_conf.conf_disable;
343 icu_data[0].conf_mask = mmp3_conf.conf_mask;
344 icu_data[0].conf2_mask = mmp3_conf.conf2_mask;
387 icu_data[i].reg_status = mmp_icu_base + reg[0];
388 icu_data[i].reg_mask = mmp_icu_base + reg[2];
389 icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);
390 if (!icu_data[i].cascade_irq)
393 icu_data[i].virq_base = 0;
394 icu_data[i].domain = irq_domain_add_linear(node, nr_irqs,
396 &icu_data[i]);
398 ret = irq_create_mapping(icu_data[i].domain, irq);
404 icu_data[i].virq_base = ret;
406 icu_data[i].nr_irqs = nr_irqs;
409 icu_data[i].clr_mfp_irq_base = icu_data[i].virq_base;
410 icu_data[i].clr_mfp_hwirq = mfp_irq;
412 irq_set_chained_handler(icu_data[i].cascade_irq,
417 if (icu_data[i].virq_base) {
419 irq_dispose_mapping(icu_data[i].virq_base + j);
421 irq_domain_remove(icu_data[i].domain);