Lines Matching defs:ctl
49 static void meson8_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
51 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl);
52 static void meson_a1_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
55 static void meson_a1_gpio_irq_init(struct meson_gpio_irq_controller *ctl);
56 static int meson8_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
58 static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
62 void (*gpio_irq_sel_pin)(struct meson_gpio_irq_controller *ctl,
64 void (*gpio_irq_init)(struct meson_gpio_irq_controller *ctl);
65 int (*gpio_irq_set_type)(struct meson_gpio_irq_controller *ctl,
179 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl,
185 spin_lock_irqsave(&ctl->lock, flags);
187 tmp = readl_relaxed(ctl->base + reg);
190 writel_relaxed(tmp, ctl->base + reg);
192 spin_unlock_irqrestore(&ctl->lock, flags);
195 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl)
199 static void meson8_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
208 meson_gpio_irq_update_bits(ctl, reg_offset,
209 ctl->params->pin_sel_mask << bit_offset,
213 static void meson_a1_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
223 meson_gpio_irq_update_bits(ctl, reg_offset,
224 ctl->params->pin_sel_mask << bit_offset,
229 static void meson_a1_gpio_irq_init(struct meson_gpio_irq_controller *ctl)
231 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL, BIT(31), BIT(31));
235 meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
242 spin_lock_irqsave(&ctl->lock, flags);
245 idx = find_first_zero_bit(ctl->channel_map, ctl->params->nr_channels);
246 if (idx >= ctl->params->nr_channels) {
247 spin_unlock_irqrestore(&ctl->lock, flags);
253 set_bit(idx, ctl->channel_map);
255 spin_unlock_irqrestore(&ctl->lock, flags);
261 ctl->params->ops.gpio_irq_sel_pin(ctl, idx, hwirq);
269 *channel_hwirq = &(ctl->channel_irqs[idx]);
278 meson_gpio_irq_get_channel_idx(struct meson_gpio_irq_controller *ctl,
281 return channel_hwirq - ctl->channel_irqs;
285 meson_gpio_irq_release_channel(struct meson_gpio_irq_controller *ctl,
290 idx = meson_gpio_irq_get_channel_idx(ctl, channel_hwirq);
291 clear_bit(idx, ctl->channel_map);
294 static int meson8_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
301 params = ctl->params;
302 idx = meson_gpio_irq_get_channel_idx(ctl, channel_hwirq);
330 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
351 static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
357 idx = meson_gpio_irq_get_channel_idx(ctl, channel_hwirq);
361 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4, BIT(idx), 0);
364 val |= BIT(ctl->params->edge_both_offset + idx);
365 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4,
366 BIT(ctl->params->edge_both_offset + idx), val);
371 val |= BIT(ctl->params->pol_low_offset + idx);
374 val |= BIT(ctl->params->edge_single_offset + idx);
376 meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
401 struct meson_gpio_irq_controller *ctl = data->domain->host_data;
405 ret = ctl->params->ops.gpio_irq_set_type(ctl, type, channel_hwirq);
462 struct meson_gpio_irq_controller *ctl = domain->host_data;
475 ret = meson_gpio_irq_request_channel(ctl, hwirq, &channel_hwirq);
483 meson_gpio_irq_release_channel(ctl, channel_hwirq);
497 struct meson_gpio_irq_controller *ctl = domain->host_data;
509 meson_gpio_irq_release_channel(ctl, channel_hwirq);
518 static int meson_gpio_irq_parse_dt(struct device_node *node, struct meson_gpio_irq_controller *ctl)
527 ctl->params = match->data;
531 ctl->channel_irqs,
532 ctl->params->nr_channels,
533 ctl->params->nr_channels);
535 pr_err("can't get %d channel interrupts\n", ctl->params->nr_channels);
539 ctl->params->ops.gpio_irq_init(ctl);
547 struct meson_gpio_irq_controller *ctl;
561 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
562 if (!ctl)
565 spin_lock_init(&ctl->lock);
567 ctl->base = of_iomap(node, 0);
568 if (!ctl->base) {
573 ret = meson_gpio_irq_parse_dt(node, ctl);
578 ctl->params->nr_hwirq,
581 ctl);
589 ctl->params->nr_hwirq, ctl->params->nr_channels);
594 iounmap(ctl->base);
596 kfree(ctl);