Lines Matching refs:data
41 static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
44 return (data->reg_num - irqnum / 32 - 1);
49 struct irqsteer_data *data = d->chip_data;
50 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
54 raw_spin_lock_irqsave(&data->lock, flags);
55 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
57 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
58 raw_spin_unlock_irqrestore(&data->lock, flags);
63 struct irqsteer_data *data = d->chip_data;
64 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
68 raw_spin_lock_irqsave(&data->lock, flags);
69 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
71 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
72 raw_spin_unlock_irqrestore(&data->lock, flags);
96 static int imx_irqsteer_get_hwirq_base(struct irqsteer_data *data, u32 irq)
100 for (i = 0; i < data->irq_count; i++) {
101 if (data->irq[i] == irq)
110 struct irqsteer_data *data = irq_desc_get_handler_data(desc);
117 hwirq = imx_irqsteer_get_hwirq_base(data, irq);
125 int idx = imx_irqsteer_get_reg_index(data, hwirq);
129 if (hwirq >= data->reg_num * 32)
132 irqmap = readl_relaxed(data->regs +
133 CHANSTATUS(idx, data->reg_num));
136 generic_handle_domain_irq(data->domain, pos + hwirq);
145 struct irqsteer_data *data;
149 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
150 if (!data)
153 data->regs = devm_platform_ioremap_resource(pdev, 0);
154 if (IS_ERR(data->regs)) {
156 return PTR_ERR(data->regs);
159 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
160 if (IS_ERR(data->ipg_clk))
161 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk),
164 raw_spin_lock_init(&data->lock);
169 ret = of_property_read_u32(np, "fsl,channel", &data->channel);
177 data->irq_count = DIV_ROUND_UP(irqs_num, 64);
178 data->reg_num = irqs_num / 32;
181 data->saved_reg = devm_kzalloc(&pdev->dev,
182 sizeof(u32) * data->reg_num,
184 if (!data->saved_reg)
188 ret = clk_prepare_enable(data->ipg_clk);
195 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
197 data->domain = irq_domain_add_linear(np, data->reg_num * 32,
198 &imx_irqsteer_domain_ops, data);
199 if (!data->domain) {
204 irq_domain_set_pm_device(data->domain, &pdev->dev);
206 if (!data->irq_count || data->irq_count > CHAN_MAX_OUTPUT_INT) {
211 for (i = 0; i < data->irq_count; i++) {
212 data->irq[i] = irq_of_parse_and_map(np, i);
213 if (!data->irq[i]) {
218 irq_set_chained_handler_and_data(data->irq[i],
220 data);
223 platform_set_drvdata(pdev, data);
230 clk_disable_unprepare(data->ipg_clk);
251 static void imx_irqsteer_save_regs(struct irqsteer_data *data)
255 for (i = 0; i < data->reg_num; i++)
256 data->saved_reg[i] = readl_relaxed(data->regs +
257 CHANMASK(i, data->reg_num));
260 static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
264 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
265 for (i = 0; i < data->reg_num; i++)
266 writel_relaxed(data->saved_reg[i],
267 data->regs + CHANMASK(i, data->reg_num));