Lines Matching defs:table
157 * translation table, and a list of interrupts. If it some of its
1879 * start poking the virtual property table.
1883 /* Write out the property to the prop table */
2290 pr_info("GICv3: using LPI property table @%pa\n",
2446 * Find out whether hw supports a single or two-level table by
2447 * table by reading bit at offset '62' after writing '1' to it.
2454 * The size of the lvl2 table is equal to ITS page size
2455 * which is 'psz'. For computing lvl1 table size,
2456 * subtract ID bits that sparse lvl2 table from 'ids'
2457 * which is reported by ITS hardware times lvl1 table
2469 * massive waste of memory if two-level device table
2534 /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */
2696 /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */
2775 __le64 *table;
2805 /* Don't allow vpe_id that exceeds single, flat table limit */
2809 /* Compute 1st level table index & check if that exceeds table limit */
2814 table = gic_data_rdist_cpu(cpu)->vpe_l1_base;
2816 /* Allocate memory for 2nd level table */
2817 if (!table[idx]) {
2822 /* Flush Lvl2 table to PoC if hw doesn't support coherency */
2826 table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID);
2830 gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE);
2832 /* Ensure updated table contents are visible to RD hardware */
2913 * If we need more than just a single L1 page, flag the table
3008 /* Check whether the property table is in a reserved region */
3072 pr_err_ratelimited("ITS virtual pending table not cleaning\n");
3109 * Check that we get the same property table on all
3153 pr_info_once("GIC: using cache flushing for LPI property table\n");
3221 pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n",
3315 __le64 *table;
3317 /* Don't allow device id that exceeds single, flat table limit */
3322 /* Compute 1st level table index & check if that exceeds table limit */
3327 table = baser->base;
3329 /* Allocate memory for 2nd level table */
3330 if (!table[idx]) {
3336 /* Flush Lvl2 table to PoC if hw doesn't support coherency */
3340 table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID);
3344 gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE);
3346 /* Ensure updated table contents are visible to ITS hardware */
3398 * the L1 table on *all* v4.1 RDs.
3909 * There is no good way of finding out if the pending table is
3913 * that the pending table is empty. A good implementation
4679 /* erratum 22375: only alloc 8MB table size (20 bits) */
5317 * If the pending table was pre-programmed, free the memory we