Lines Matching defs:iommu
14 #include <linux/iommu.h>
99 struct iommu_device iommu;
124 struct sun50i_iommu *iommu;
137 static u32 iommu_read(struct sun50i_iommu *iommu, u32 offset)
139 return readl(iommu->base + offset);
142 static void iommu_write(struct sun50i_iommu *iommu, u32 offset, u32 value)
144 writel(value, iommu->base + offset);
293 struct sun50i_iommu *iommu = sun50i_domain->iommu;
297 dma_sync_single_for_device(iommu->dev, dma, size, DMA_TO_DEVICE);
300 static void sun50i_iommu_zap_iova(struct sun50i_iommu *iommu,
306 iommu_write(iommu, IOMMU_TLB_IVLD_ADDR_REG, iova);
307 iommu_write(iommu, IOMMU_TLB_IVLD_ADDR_MASK_REG, GENMASK(31, 12));
308 iommu_write(iommu, IOMMU_TLB_IVLD_ENABLE_REG,
311 ret = readl_poll_timeout_atomic(iommu->base + IOMMU_TLB_IVLD_ENABLE_REG,
314 dev_warn(iommu->dev, "TLB invalidation timed out!\n");
317 static void sun50i_iommu_zap_ptw_cache(struct sun50i_iommu *iommu,
323 iommu_write(iommu, IOMMU_PC_IVLD_ADDR_REG, iova);
324 iommu_write(iommu, IOMMU_PC_IVLD_ENABLE_REG,
327 ret = readl_poll_timeout_atomic(iommu->base + IOMMU_PC_IVLD_ENABLE_REG,
330 dev_warn(iommu->dev, "PTW cache invalidation timed out!\n");
333 static void sun50i_iommu_zap_range(struct sun50i_iommu *iommu,
336 assert_spin_locked(&iommu->iommu_lock);
338 iommu_write(iommu, IOMMU_AUTO_GATING_REG, 0);
340 sun50i_iommu_zap_iova(iommu, iova);
341 sun50i_iommu_zap_iova(iommu, iova + SPAGE_SIZE);
343 sun50i_iommu_zap_iova(iommu, iova + size);
344 sun50i_iommu_zap_iova(iommu, iova + size + SPAGE_SIZE);
346 sun50i_iommu_zap_ptw_cache(iommu, iova);
347 sun50i_iommu_zap_ptw_cache(iommu, iova + SZ_1M);
349 sun50i_iommu_zap_ptw_cache(iommu, iova + size);
350 sun50i_iommu_zap_ptw_cache(iommu, iova + size + SZ_1M);
353 iommu_write(iommu, IOMMU_AUTO_GATING_REG, IOMMU_AUTO_GATING_ENABLE);
356 static int sun50i_iommu_flush_all_tlb(struct sun50i_iommu *iommu)
361 assert_spin_locked(&iommu->iommu_lock);
363 iommu_write(iommu,
374 ret = readl_poll_timeout_atomic(iommu->base + IOMMU_TLB_FLUSH_REG,
378 dev_warn(iommu->dev, "TLB Flush timed out!\n");
386 struct sun50i_iommu *iommu = sun50i_domain->iommu;
391 * .probe_device, and since we link our (single) domain to our iommu in
397 if (!iommu)
400 spin_lock_irqsave(&iommu->iommu_lock, flags);
401 sun50i_iommu_flush_all_tlb(iommu);
402 spin_unlock_irqrestore(&iommu->iommu_lock, flags);
409 struct sun50i_iommu *iommu = sun50i_domain->iommu;
412 spin_lock_irqsave(&iommu->iommu_lock, flags);
413 sun50i_iommu_zap_range(iommu, iova, size);
414 spin_unlock_irqrestore(&iommu->iommu_lock, flags);
423 static int sun50i_iommu_enable(struct sun50i_iommu *iommu)
429 if (!iommu->domain)
432 sun50i_domain = to_sun50i_domain(iommu->domain);
434 ret = reset_control_deassert(iommu->reset);
438 ret = clk_prepare_enable(iommu->clk);
442 spin_lock_irqsave(&iommu->iommu_lock, flags);
444 iommu_write(iommu, IOMMU_TTB_REG, sun50i_domain->dt_dma);
445 iommu_write(iommu, IOMMU_TLB_PREFETCH_REG,
452 iommu_write(iommu, IOMMU_INT_ENABLE_REG, IOMMU_INT_MASK);
453 iommu_write(iommu, IOMMU_DM_AUT_CTRL_REG(SUN50I_IOMMU_ACI_NONE),
467 iommu_write(iommu, IOMMU_DM_AUT_CTRL_REG(SUN50I_IOMMU_ACI_RD),
475 iommu_write(iommu, IOMMU_DM_AUT_CTRL_REG(SUN50I_IOMMU_ACI_WR),
483 ret = sun50i_iommu_flush_all_tlb(iommu);
485 spin_unlock_irqrestore(&iommu->iommu_lock, flags);
489 iommu_write(iommu, IOMMU_AUTO_GATING_REG, IOMMU_AUTO_GATING_ENABLE);
490 iommu_write(iommu, IOMMU_ENABLE_REG, IOMMU_ENABLE_ENABLE);
492 spin_unlock_irqrestore(&iommu->iommu_lock, flags);
497 clk_disable_unprepare(iommu->clk);
500 reset_control_assert(iommu->reset);
505 static void sun50i_iommu_disable(struct sun50i_iommu *iommu)
509 spin_lock_irqsave(&iommu->iommu_lock, flags);
511 iommu_write(iommu, IOMMU_ENABLE_REG, 0);
512 iommu_write(iommu, IOMMU_TTB_REG, 0);
514 spin_unlock_irqrestore(&iommu->iommu_lock, flags);
516 clk_disable_unprepare(iommu->clk);
517 reset_control_assert(iommu->reset);
520 static void *sun50i_iommu_alloc_page_table(struct sun50i_iommu *iommu,
526 page_table = kmem_cache_zalloc(iommu->pt_pool, gfp);
530 pt_dma = dma_map_single(iommu->dev, page_table, PT_SIZE, DMA_TO_DEVICE);
531 if (dma_mapping_error(iommu->dev, pt_dma)) {
532 dev_err(iommu->dev, "Couldn't map L2 Page Table\n");
533 kmem_cache_free(iommu->pt_pool, page_table);
543 static void sun50i_iommu_free_page_table(struct sun50i_iommu *iommu,
548 dma_unmap_single(iommu->dev, pt_phys, PT_SIZE, DMA_TO_DEVICE);
549 kmem_cache_free(iommu->pt_pool, page_table);
555 struct sun50i_iommu *iommu = sun50i_domain->iommu;
568 page_table = sun50i_iommu_alloc_page_table(iommu, gfp);
582 sun50i_iommu_free_page_table(iommu, drop_pt);
595 struct sun50i_iommu *iommu = sun50i_domain->iommu;
610 dev_err(iommu->dev,
711 static int sun50i_iommu_attach_domain(struct sun50i_iommu *iommu,
714 iommu->domain = &sun50i_domain->domain;
715 sun50i_domain->iommu = iommu;
717 sun50i_domain->dt_dma = dma_map_single(iommu->dev, sun50i_domain->dt,
719 if (dma_mapping_error(iommu->dev, sun50i_domain->dt_dma)) {
720 dev_err(iommu->dev, "Couldn't map L1 Page Table\n");
724 return sun50i_iommu_enable(iommu);
727 static void sun50i_iommu_detach_domain(struct sun50i_iommu *iommu,
748 sun50i_iommu_free_page_table(iommu, page_table);
752 sun50i_iommu_disable(iommu);
754 dma_unmap_single(iommu->dev, virt_to_phys(sun50i_domain->dt),
757 iommu->domain = NULL;
764 struct sun50i_iommu *iommu = dev_iommu_priv_get(dev);
768 if (iommu->domain != domain)
772 sun50i_iommu_detach_domain(iommu, sun50i_domain);
779 struct sun50i_iommu *iommu;
781 iommu = sun50i_iommu_from_dev(dev);
782 if (!iommu)
789 if (iommu->domain == domain)
792 if (iommu->domain)
793 sun50i_iommu_detach_device(iommu->domain, dev);
795 sun50i_iommu_attach_domain(iommu, sun50i_domain);
802 struct sun50i_iommu *iommu;
804 iommu = sun50i_iommu_from_dev(dev);
805 if (!iommu)
808 return &iommu->iommu;
813 struct sun50i_iommu *iommu = sun50i_iommu_from_dev(dev);
815 return iommu_group_ref_get(iommu->group);
847 static void sun50i_iommu_report_fault(struct sun50i_iommu *iommu,
851 dev_err(iommu->dev, "Page fault for %pad (master %d, dir %s)\n",
854 if (iommu->domain)
855 report_iommu_fault(iommu->domain, iommu->dev, iova, prot);
857 dev_err(iommu->dev, "Page fault while iommu not attached to any domain?\n");
859 sun50i_iommu_zap_range(iommu, iova, SPAGE_SIZE);
862 static phys_addr_t sun50i_iommu_handle_pt_irq(struct sun50i_iommu *iommu,
870 assert_spin_locked(&iommu->iommu_lock);
872 iova = iommu_read(iommu, addr_reg);
873 blame = iommu_read(iommu, blame_reg);
881 sun50i_iommu_report_fault(iommu, master, iova, IOMMU_FAULT_READ);
886 static phys_addr_t sun50i_iommu_handle_perm_irq(struct sun50i_iommu *iommu)
894 assert_spin_locked(&iommu->iommu_lock);
896 blame = iommu_read(iommu, IOMMU_INT_STA_REG);
898 iova = iommu_read(iommu, IOMMU_INT_ERR_ADDR_REG(master));
899 aci = sun50i_get_pte_aci(iommu_read(iommu,
936 sun50i_iommu_report_fault(iommu, master, iova, dir);
944 struct sun50i_iommu *iommu = dev_id;
946 spin_lock(&iommu->iommu_lock);
948 status = iommu_read(iommu, IOMMU_INT_STA_REG);
950 spin_unlock(&iommu->iommu_lock);
954 l1_status = iommu_read(iommu, IOMMU_L1PG_INT_REG);
955 l2_status = iommu_read(iommu, IOMMU_L2PG_INT_REG);
958 sun50i_iommu_handle_pt_irq(iommu,
962 sun50i_iommu_handle_pt_irq(iommu,
966 sun50i_iommu_handle_perm_irq(iommu);
968 iommu_write(iommu, IOMMU_INT_CLR_REG, status);
971 iommu_write(iommu, IOMMU_RESET_REG, ~resets);
972 iommu_write(iommu, IOMMU_RESET_REG, IOMMU_RESET_RELEASE_ALL);
974 spin_unlock(&iommu->iommu_lock);
981 struct sun50i_iommu *iommu;
984 iommu = devm_kzalloc(&pdev->dev, sizeof(*iommu), GFP_KERNEL);
985 if (!iommu)
987 spin_lock_init(&iommu->iommu_lock);
988 platform_set_drvdata(pdev, iommu);
989 iommu->dev = &pdev->dev;
991 iommu->pt_pool = kmem_cache_create(dev_name(&pdev->dev),
995 if (!iommu->pt_pool)
998 iommu->group = iommu_group_alloc();
999 if (IS_ERR(iommu->group)) {
1000 ret = PTR_ERR(iommu->group);
1004 iommu->base = devm_platform_ioremap_resource(pdev, 0);
1005 if (IS_ERR(iommu->base)) {
1006 ret = PTR_ERR(iommu->base);
1016 iommu->clk = devm_clk_get(&pdev->dev, NULL);
1017 if (IS_ERR(iommu->clk)) {
1019 ret = PTR_ERR(iommu->clk);
1023 iommu->reset = devm_reset_control_get(&pdev->dev, NULL);
1024 if (IS_ERR(iommu->reset)) {
1026 ret = PTR_ERR(iommu->reset);
1030 ret = iommu_device_sysfs_add(&iommu->iommu, &pdev->dev,
1035 ret = iommu_device_register(&iommu->iommu, &sun50i_iommu_ops, &pdev->dev);
1040 dev_name(&pdev->dev), iommu);
1047 iommu_device_unregister(&iommu->iommu);
1050 iommu_device_sysfs_remove(&iommu->iommu);
1053 iommu_group_put(iommu->group);
1056 kmem_cache_destroy(iommu->pt_pool);
1062 { .compatible = "allwinner,sun50i-h6-iommu", },
1069 .name = "sun50i-iommu",