Lines Matching refs:bases
107 void __iomem **bases;
350 writel(command, iommu->bases[i] + RK_MMU_COMMAND);
370 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);
380 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) &
392 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) &
404 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0;
429 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
450 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
471 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
492 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS));
512 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, dte_addr);
514 if (dte_addr != rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR)) {
535 void __iomem *base = iommu->bases[index];
597 int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS);
602 iova = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT_ADDR);
607 status = rk_iommu_read(iommu->bases[i], RK_MMU_STATUS);
628 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
629 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_PAGE_FAULT_DONE);
639 rk_iommu_write(iommu->bases[i], RK_MMU_INT_CLEAR, int_status);
914 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, 0);
915 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0);
941 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
943 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
944 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);
1235 iommu->bases = devm_kcalloc(dev, num_res, sizeof(*iommu->bases),
1237 if (!iommu->bases)
1244 iommu->bases[i] = devm_ioremap_resource(&pdev->dev, res);
1245 if (IS_ERR(iommu->bases[i]))
1250 return PTR_ERR(iommu->bases[0]);