Lines Matching defs:obj
74 struct omap_iommu *obj;
82 obj = arch_data->iommu_dev;
83 p = obj->ctx;
85 p[i] = iommu_read_reg(obj, i * sizeof(u32));
86 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i,
104 struct omap_iommu *obj;
112 obj = arch_data->iommu_dev;
113 p = obj->ctx;
115 iommu_write_reg(obj, p[i], i * sizeof(u32));
116 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i,
124 static void dra7_cfg_dspsys_mmu(struct omap_iommu *obj, bool enable)
128 if (!obj->syscfg)
131 mask = (1 << (obj->id * DSP_SYS_MMU_CONFIG_EN_SHIFT));
133 regmap_update_bits(obj->syscfg, DSP_SYS_MMU_CONFIG, mask, val);
136 static void __iommu_set_twl(struct omap_iommu *obj, bool on)
138 u32 l = iommu_read_reg(obj, MMU_CNTL);
141 iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
143 iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
151 iommu_write_reg(obj, l, MMU_CNTL);
154 static int omap2_iommu_enable(struct omap_iommu *obj)
158 if (!obj->iopgd || !IS_ALIGNED((unsigned long)obj->iopgd, SZ_16K))
161 pa = virt_to_phys(obj->iopgd);
165 l = iommu_read_reg(obj, MMU_REVISION);
166 dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
169 iommu_write_reg(obj, pa, MMU_TTB);
171 dra7_cfg_dspsys_mmu(obj, true);
173 if (obj->has_bus_err_back)
174 iommu_write_reg(obj, MMU_GP_REG_BUS_ERR_BACK_EN, MMU_GP_REG);
176 __iommu_set_twl(obj, true);
181 static void omap2_iommu_disable(struct omap_iommu *obj)
183 u32 l = iommu_read_reg(obj, MMU_CNTL);
186 iommu_write_reg(obj, l, MMU_CNTL);
187 dra7_cfg_dspsys_mmu(obj, false);
189 dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
192 static int iommu_enable(struct omap_iommu *obj)
196 ret = pm_runtime_get_sync(obj->dev);
198 pm_runtime_put_noidle(obj->dev);
203 static void iommu_disable(struct omap_iommu *obj)
205 pm_runtime_put_sync(obj->dev);
231 static u32 iommu_report_fault(struct omap_iommu *obj, u32 *da)
235 status = iommu_read_reg(obj, MMU_IRQSTATUS);
242 fault_addr = iommu_read_reg(obj, MMU_FAULT_AD);
245 iommu_write_reg(obj, status, MMU_IRQSTATUS);
250 void iotlb_lock_get(struct omap_iommu *obj, struct iotlb_lock *l)
254 val = iommu_read_reg(obj, MMU_LOCK);
260 void iotlb_lock_set(struct omap_iommu *obj, struct iotlb_lock *l)
267 iommu_write_reg(obj, val, MMU_LOCK);
270 static void iotlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr)
272 cr->cam = iommu_read_reg(obj, MMU_READ_CAM);
273 cr->ram = iommu_read_reg(obj, MMU_READ_RAM);
276 static void iotlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr)
278 iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM);
279 iommu_write_reg(obj, cr->ram, MMU_RAM);
281 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
282 iommu_write_reg(obj, 1, MMU_LD_TLB);
286 struct cr_regs __iotlb_read_cr(struct omap_iommu *obj, int n)
291 iotlb_lock_get(obj, &l);
293 iotlb_lock_set(obj, &l);
294 iotlb_read_cr(obj, &cr);
300 static struct cr_regs *iotlb_alloc_cr(struct omap_iommu *obj,
309 dev_err(obj->dev, "%s:\twrong alignment: %08x\n", __func__,
326 * @obj: target iommu
329 static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
335 if (!obj || !obj->nr_tlb_entries || !e)
338 pm_runtime_get_sync(obj->dev);
340 iotlb_lock_get(obj, &l);
341 if (l.base == obj->nr_tlb_entries) {
342 dev_warn(obj->dev, "%s: preserve entries full\n", __func__);
350 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp)
354 if (i == obj->nr_tlb_entries) {
355 dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
360 iotlb_lock_get(obj, &l);
363 iotlb_lock_set(obj, &l);
366 cr = iotlb_alloc_cr(obj, e);
368 pm_runtime_put_sync(obj->dev);
372 iotlb_load_cr(obj, cr);
378 if (++l.vict == obj->nr_tlb_entries)
380 iotlb_lock_set(obj, &l);
382 pm_runtime_put_sync(obj->dev);
388 static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
395 static int prefetch_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
397 return load_iotlb_entry(obj, e);
402 * @obj: target iommu
407 static void flush_iotlb_page(struct omap_iommu *obj, u32 da)
412 pm_runtime_get_sync(obj->dev);
414 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) {
425 dev_dbg(obj->dev, "%s: %08x<=%08x(%zx)\n",
427 iotlb_load_cr(obj, &cr);
428 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
432 pm_runtime_put_sync(obj->dev);
434 if (i == obj->nr_tlb_entries)
435 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
440 * @obj: target iommu
442 static void flush_iotlb_all(struct omap_iommu *obj)
446 pm_runtime_get_sync(obj->dev);
450 iotlb_lock_set(obj, &l);
452 iommu_write_reg(obj, 1, MMU_GFLUSH);
454 pm_runtime_put_sync(obj->dev);
468 static void iopte_free(struct omap_iommu *obj, u32 *iopte, bool dma_valid)
476 dma_unmap_single(obj->dev, pt_dma, IOPTE_TABLE_SIZE,
484 static u32 *iopte_alloc(struct omap_iommu *obj, u32 *iopgd,
497 spin_unlock(&obj->page_table_lock);
499 spin_lock(&obj->page_table_lock);
505 *pt_dma = dma_map_single(obj->dev, iopte, IOPTE_TABLE_SIZE,
507 if (dma_mapping_error(obj->dev, *pt_dma)) {
508 dev_err(obj->dev, "DMA map error for L2 table\n");
509 iopte_free(obj, iopte, false);
518 dev_err(obj->dev, "DMA translation error for L2 table\n");
519 dma_unmap_single(obj->dev, *pt_dma, IOPTE_TABLE_SIZE,
521 iopte_free(obj, iopte, false);
527 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1);
528 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
531 iopte_free(obj, iopte, false);
537 dev_vdbg(obj->dev,
544 static int iopgd_alloc_section(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
546 u32 *iopgd = iopgd_offset(obj, da);
550 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
556 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1);
560 static int iopgd_alloc_super(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
562 u32 *iopgd = iopgd_offset(obj, da);
567 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
574 flush_iopte_range(obj->dev, obj->pd_dma, offset, 16);
578 static int iopte_alloc_page(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
580 u32 *iopgd = iopgd_offset(obj, da);
582 u32 *iopte = iopte_alloc(obj, iopgd, &pt_dma, da);
589 flush_iopte_range(obj->dev, pt_dma, offset, 1);
591 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
597 static int iopte_alloc_large(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
599 u32 *iopgd = iopgd_offset(obj, da);
601 u32 *iopte = iopte_alloc(obj, iopgd, &pt_dma, da);
606 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
616 flush_iopte_range(obj->dev, pt_dma, offset, 16);
621 iopgtable_store_entry_core(struct omap_iommu *obj, struct iotlb_entry *e)
627 if (!obj || !e)
653 spin_lock(&obj->page_table_lock);
654 err = fn(obj, e->da, e->pa, prot);
655 spin_unlock(&obj->page_table_lock);
662 * @obj: target iommu
666 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e)
670 flush_iotlb_page(obj, e->da);
671 err = iopgtable_store_entry_core(obj, e);
673 prefetch_iotlb_entry(obj, e);
679 * @obj: target iommu
685 iopgtable_lookup_entry(struct omap_iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
689 iopgd = iopgd_offset(obj, da);
700 static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da)
703 u32 *iopgd = iopgd_offset(obj, da);
725 flush_iopte_range(obj->dev, pt_dma, pt_offset, nent);
735 iopte_free(obj, iopte, true);
742 iopgd = iopgd_offset(obj, (da & IOSUPER_MASK));
747 flush_iopte_range(obj->dev, obj->pd_dma, pd_offset, nent);
754 * @obj: target iommu
757 static size_t iopgtable_clear_entry(struct omap_iommu *obj, u32 da)
761 spin_lock(&obj->page_table_lock);
763 bytes = iopgtable_clear_entry_core(obj, da);
764 flush_iotlb_page(obj, da);
766 spin_unlock(&obj->page_table_lock);
771 static void iopgtable_clear_entry_all(struct omap_iommu *obj)
776 spin_lock(&obj->page_table_lock);
783 iopgd = iopgd_offset(obj, da);
790 iopte_free(obj, iopte_offset(iopgd, 0), true);
793 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1);
796 flush_iotlb_all(obj);
798 spin_unlock(&obj->page_table_lock);
808 struct omap_iommu *obj = data;
809 struct iommu_domain *domain = obj->domain;
815 errs = iommu_report_fault(obj, &da);
820 if (!report_iommu_fault(domain, obj->dev, da, 0))
823 iommu_write_reg(obj, 0, MMU_IRQENABLE);
825 iopgd = iopgd_offset(obj, da);
828 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:px%08x\n",
829 obj->name, errs, da, iopgd, *iopgd);
835 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x pte:0x%p *pte:0x%08x\n",
836 obj->name, errs, da, iopgd, *iopgd, iopte, *iopte);
843 * @obj: target omap iommu device
846 static int omap_iommu_attach(struct omap_iommu *obj, u32 *iopgd)
850 spin_lock(&obj->iommu_lock);
852 obj->pd_dma = dma_map_single(obj->dev, iopgd, IOPGD_TABLE_SIZE,
854 if (dma_mapping_error(obj->dev, obj->pd_dma)) {
855 dev_err(obj->dev, "DMA map error for L1 table\n");
860 obj->iopgd = iopgd;
861 err = iommu_enable(obj);
864 flush_iotlb_all(obj);
866 spin_unlock(&obj->iommu_lock);
868 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
873 spin_unlock(&obj->iommu_lock);
880 * @obj: target iommu
882 static void omap_iommu_detach(struct omap_iommu *obj)
884 if (!obj || IS_ERR(obj))
887 spin_lock(&obj->iommu_lock);
889 dma_unmap_single(obj->dev, obj->pd_dma, IOPGD_TABLE_SIZE,
891 obj->pd_dma = 0;
892 obj->iopgd = NULL;
893 iommu_disable(obj);
895 spin_unlock(&obj->iommu_lock);
897 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
900 static void omap_iommu_save_tlb_entries(struct omap_iommu *obj)
908 iotlb_lock_get(obj, &lock);
909 obj->num_cr_ctx = lock.base;
910 if (!obj->num_cr_ctx)
913 tmp = obj->cr_ctx;
914 for_each_iotlb_cr(obj, obj->num_cr_ctx, i, cr)
918 static void omap_iommu_restore_tlb_entries(struct omap_iommu *obj)
925 if (!obj->num_cr_ctx)
929 tmp = obj->cr_ctx;
930 for (i = 0; i < obj->num_cr_ctx; i++, tmp++) {
932 iotlb_lock_set(obj, &l);
933 iotlb_load_cr(obj, tmp);
935 l.base = obj->num_cr_ctx;
937 iotlb_lock_set(obj, &l);
1014 struct omap_iommu *obj = to_iommu(dev);
1018 if (obj->domain && obj->iopgd)
1019 omap_iommu_save_tlb_entries(obj);
1021 omap2_iommu_disable(obj);
1030 ret = pdata->set_pwrdm_constraint(pdev, false, &obj->pwrst);
1032 dev_warn(obj->dev, "pwrdm_constraint failed to be reset, status = %d\n",
1056 struct omap_iommu *obj = to_iommu(dev);
1060 ret = pdata->set_pwrdm_constraint(pdev, true, &obj->pwrst);
1062 dev_warn(obj->dev, "pwrdm_constraint failed to be set, status = %d\n",
1079 if (obj->domain)
1080 omap_iommu_restore_tlb_entries(obj);
1082 ret = omap2_iommu_enable(obj);
1123 struct omap_iommu *obj)
1136 obj->syscfg =
1138 if (IS_ERR(obj->syscfg)) {
1140 ret = PTR_ERR(obj->syscfg);
1145 &obj->id)) {
1150 if (obj->id != 0 && obj->id != 1) {
1165 struct omap_iommu *obj;
1174 obj = devm_kzalloc(&pdev->dev, sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
1175 if (!obj)
1187 obj->name = dev_name(&pdev->dev);
1188 obj->nr_tlb_entries = 32;
1189 err = of_property_read_u32(of, "ti,#tlb-entries", &obj->nr_tlb_entries);
1192 if (obj->nr_tlb_entries != 32 && obj->nr_tlb_entries != 8)
1195 obj->has_bus_err_back = MMU_GP_REG_BUS_ERR_BACK_EN;
1197 obj->dev = &pdev->dev;
1198 obj->ctx = (void *)obj + sizeof(*obj);
1199 obj->cr_ctx = devm_kzalloc(&pdev->dev,
1200 sizeof(*obj->cr_ctx) * obj->nr_tlb_entries,
1202 if (!obj->cr_ctx)
1205 spin_lock_init(&obj->iommu_lock);
1206 spin_lock_init(&obj->page_table_lock);
1209 obj->regbase = devm_ioremap_resource(obj->dev, res);
1210 if (IS_ERR(obj->regbase))
1211 return PTR_ERR(obj->regbase);
1213 err = omap_iommu_dra7_get_dsp_system_cfg(pdev, obj);
1221 err = devm_request_irq(obj->dev, irq, iommu_fault_handler, IRQF_SHARED,
1222 dev_name(obj->dev), obj);
1225 platform_set_drvdata(pdev, obj);
1228 obj->group = iommu_group_alloc();
1229 if (IS_ERR(obj->group))
1230 return PTR_ERR(obj->group);
1232 err = iommu_device_sysfs_add(&obj->iommu, obj->dev, NULL,
1233 obj->name);
1237 err = iommu_device_register(&obj->iommu, &omap_iommu_ops, &pdev->dev);
1242 pm_runtime_enable(obj->dev);
1244 omap_iommu_debugfs_add(obj);
1246 dev_info(&pdev->dev, "%s registered\n", obj->name);
1254 iommu_device_sysfs_remove(&obj->iommu);
1256 iommu_group_put(obj->group);
1262 struct omap_iommu *obj = platform_get_drvdata(pdev);
1264 if (obj->group) {
1265 iommu_group_put(obj->group);
1266 obj->group = NULL;
1268 iommu_device_sysfs_remove(&obj->iommu);
1269 iommu_device_unregister(&obj->iommu);
1272 omap_iommu_debugfs_remove(obj);
1274 pm_runtime_disable(obj->dev);
1276 dev_info(&pdev->dev, "%s removed\n", obj->name);