Lines Matching defs:base
97 void __iomem *base;
101 phys_addr_t protect_base; /* protect memory base */
164 data->base + REG_MMU_INV_SEL);
165 writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
176 data->base + REG_MMU_INV_SEL);
178 data->base + REG_MMU_INVLD_START_A);
180 data->base + REG_MMU_INVLD_END_A);
181 writel_relaxed(F_MMU_INV_RANGE, data->base + REG_MMU_INVALIDATE);
183 ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
191 writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
202 int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST);
203 fault_iova = readl_relaxed(data->base + REG_MMU_FAULT_VA);
206 fault_pa = readl_relaxed(data->base + REG_MMU_INVLD_PA);
207 regval = readl_relaxed(data->base + REG_MMU_INT_ID);
223 regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL);
225 writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
266 writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
551 writel_relaxed(regval, data->base + REG_MMU_CTRL_REG);
561 writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
565 data->base + REG_MMU_IVRP_PADDR);
567 writel_relaxed(F_MMU_DCM_ON, data->base + REG_MMU_DCM);
571 writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR);
632 data->base = devm_ioremap_resource(dev, res);
633 if (IS_ERR(data->base))
634 return PTR_ERR(data->base);
722 void __iomem *base = data->base;
724 reg->standard_axi_mode = readl_relaxed(base +
726 reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM);
727 reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG);
728 reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL);
736 void __iomem *base = data->base;
738 writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR);
740 base + REG_MMU_STANDARD_AXI_MODE);
741 writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM);
742 writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG);
743 writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL);
744 writel_relaxed(data->protect_base, base + REG_MMU_IVRP_PADDR);