Lines Matching refs:bank0
377 /* Tlb flush all always is in bank0. */
1021 const struct mtk_iommu_bank_data *bank0 = &data->bank[0];
1025 * Global control settings are in bank0. May re-init these global registers
1026 * since no sure if there is bank0 consumers.
1032 regval = readl_relaxed(bank0->base + REG_MMU_CTRL_REG);
1035 writel_relaxed(regval, bank0->base + REG_MMU_CTRL_REG);
1044 writel_relaxed(regval, bank0->base + REG_MMU_VLD_PA_RNG);
1047 writel_relaxed(F_MMU_DCM, bank0->base + REG_MMU_DCM_DIS);
1049 writel_relaxed(0, bank0->base + REG_MMU_DCM_DIS);
1053 regval = readl_relaxed(bank0->base + REG_MMU_WR_LEN_CTRL);
1055 writel_relaxed(regval, bank0->base + REG_MMU_WR_LEN_CTRL);
1062 regval = readl_relaxed(bank0->base + REG_MMU_MISC_CTRL);
1068 writel_relaxed(regval, bank0->base + REG_MMU_MISC_CTRL);