Lines Matching defs:bank
230 * The IOMMU HW may have 5 banks. Each bank has a independent pgtable.
231 * Here list how many banks this SoC supports/enables and which ports are in which bank.
249 struct mtk_iommu_domain *m4u_dom; /* Each bank has a domain */
264 struct mtk_iommu_bank_data *bank;
284 struct mtk_iommu_bank_data *bank;
378 struct mtk_iommu_bank_data *bank = &data->bank[0];
379 void __iomem *base = bank->base;
382 spin_lock_irqsave(&bank->tlb_lock, flags);
386 spin_unlock_irqrestore(&bank->tlb_lock, flags);
390 struct mtk_iommu_bank_data *bank)
392 struct list_head *head = bank->parent_data->hw_list;
424 curbank = &data->bank[bank->id];
457 struct mtk_iommu_bank_data *bank = dev_id;
458 struct mtk_iommu_data *data = bank->parent_data;
459 struct mtk_iommu_domain *dom = bank->m4u_dom;
463 void __iomem *base = bank->base;
507 if (!dom || report_iommu_fault(&dom->domain, bank->parent_dev, fault_iova,
510 bank->parent_dev,
602 larb_mmu->bank[portid] = upper_32_bits(region->iova_base);
604 dev_dbg(dev, "%s iommu for larb(%s) port 0x%lx region %d rgn-bank %d.\n",
718 struct mtk_iommu_bank_data *bank;
728 if (!dom->bank) {
739 dom->bank = &data->bank[bankid];
744 bank = &data->bank[bankid];
745 if (!bank->m4u_dom) { /* Initialize the M4U HW for each a BANK */
757 bank->m4u_dom = dom;
758 writel(dom->cfg.arm_v7s_cfg.ttbr, bank->base + REG_MMU_PT_BASE_ADDR);
786 if (dom->bank->parent_data->enable_4GB)
807 if (dom->bank)
808 mtk_iommu_tlb_flush_all(dom->bank->parent_data);
817 mtk_iommu_tlb_flush_range_sync(gather->start, length, dom->bank);
825 mtk_iommu_tlb_flush_range_sync(iova, size, dom->bank);
836 dom->bank->parent_data->enable_4GB &&
907 * If the bank function is enabled, each bank is a iommu group/domain.
1020 const struct mtk_iommu_bank_data *bankx = &data->bank[bankid];
1021 const struct mtk_iommu_bank_data *bank0 = &data->bank[0];
1070 /* Independent settings for each bank */
1241 struct mtk_iommu_bank_data *bank;
1302 data->bank = devm_kmalloc(dev, banks_num * sizeof(*data->bank), GFP_KERNEL);
1303 if (!data->bank)
1309 bank = &data->bank[i];
1310 bank->id = i;
1311 bank->base = base + i * MTK_IOMMU_BANK_SZ;
1312 bank->m4u_dom = NULL;
1314 bank->irq = platform_get_irq(pdev, i);
1315 if (bank->irq < 0)
1316 return bank->irq;
1317 bank->parent_dev = dev;
1318 bank->parent_data = data;
1319 spin_lock_init(&bank->tlb_lock);
1398 struct mtk_iommu_bank_data *bank;
1412 bank = &data->bank[i];
1413 if (!bank->m4u_dom)
1415 devm_free_irq(&pdev->dev, bank->irq, bank);
1426 base = data->bank[i].base;
1435 base = data->bank[i].base;
1465 base = data->bank[i].base;
1472 m4u_dom = data->bank[i].m4u_dom;
1475 base = data->bank[i].base;