Lines Matching refs:mmu
72 struct ipmmu_vmsa_device *mmu;
150 static bool ipmmu_is_root(struct ipmmu_vmsa_device *mmu)
152 return mmu->root == mmu;
157 struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
160 if (ipmmu_is_root(mmu))
161 *rootp = mmu;
178 static u32 ipmmu_read(struct ipmmu_vmsa_device *mmu, unsigned int offset)
180 return ioread32(mmu->base + offset);
183 static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
186 iowrite32(data, mmu->base + offset);
189 static unsigned int ipmmu_ctx_reg(struct ipmmu_vmsa_device *mmu,
192 unsigned int base = mmu->features->ctx_offset_base;
197 return base + context_id * mmu->features->ctx_offset_stride + reg;
200 static u32 ipmmu_ctx_read(struct ipmmu_vmsa_device *mmu,
203 return ipmmu_read(mmu, ipmmu_ctx_reg(mmu, context_id, reg));
206 static void ipmmu_ctx_write(struct ipmmu_vmsa_device *mmu,
209 ipmmu_write(mmu, ipmmu_ctx_reg(mmu, context_id, reg), data);
215 return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg);
221 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);
227 if (domain->mmu != domain->mmu->root)
228 ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data);
230 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data);
233 static u32 ipmmu_utlb_reg(struct ipmmu_vmsa_device *mmu, unsigned int reg)
235 return mmu->features->utlb_offset_base + reg;
238 static void ipmmu_imuasid_write(struct ipmmu_vmsa_device *mmu,
241 ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb)), data);
244 static void ipmmu_imuctr_write(struct ipmmu_vmsa_device *mmu,
247 ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUCTR(utlb)), data);
262 dev_err_ratelimited(domain->mmu->dev,
283 struct ipmmu_vmsa_device *mmu = domain->mmu;
291 ipmmu_imuasid_write(mmu, utlb, 0);
293 ipmmu_imuctr_write(mmu, utlb, IMUCTR_TTSEL_MMU(domain->context_id) |
295 mmu->utlb_ctx[utlb] = domain->context_id;
320 static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu,
326 spin_lock_irqsave(&mmu->lock, flags);
328 ret = find_first_zero_bit(mmu->ctx, mmu->num_ctx);
329 if (ret != mmu->num_ctx) {
330 mmu->domains[ret] = domain;
331 set_bit(ret, mmu->ctx);
335 spin_unlock_irqrestore(&mmu->lock, flags);
340 static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu,
345 spin_lock_irqsave(&mmu->lock, flags);
347 clear_bit(context_id, mmu->ctx);
348 mmu->domains[context_id] = NULL;
350 spin_unlock_irqrestore(&mmu->lock, flags);
368 if (domain->mmu->features->twobit_imttbcr_sl0)
373 if (domain->mmu->features->cache_snoop)
384 if (domain->mmu->features->setup_imbuscr)
433 domain->cfg.iommu_dev = domain->mmu->root->dev;
438 ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
447 ipmmu_domain_free_context(domain->mmu->root,
458 if (!domain->mmu)
469 ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
479 struct ipmmu_vmsa_device *mmu = domain->mmu;
501 dev_err_ratelimited(mmu->dev, "Multiple TLB hits @0x%lx\n",
504 dev_err_ratelimited(mmu->dev, "Page Table Walk Abort @0x%lx\n",
516 if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))
519 dev_err_ratelimited(mmu->dev,
528 struct ipmmu_vmsa_device *mmu = dev;
533 spin_lock_irqsave(&mmu->lock, flags);
538 for (i = 0; i < mmu->num_ctx; i++) {
539 if (!mmu->domains[i])
541 if (ipmmu_domain_irq(mmu->domains[i]) == IRQ_HANDLED)
545 spin_unlock_irqrestore(&mmu->lock, flags);
587 struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
592 if (!mmu) {
599 if (!domain->mmu) {
601 domain->mmu = mmu;
605 domain->mmu = NULL;
610 } else if (domain->mmu != mmu) {
653 if (domain->mmu)
754 struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
766 if (!mmu->mapping) {
772 dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n");
777 mmu->mapping = mapping;
781 ret = arm_iommu_attach_device(dev, mmu->mapping);
790 if (mmu->mapping)
791 arm_iommu_release_mapping(mmu->mapping);
798 struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
803 if (!mmu)
806 return &mmu->iommu;
823 struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
829 ipmmu_imuctr_write(mmu, utlb, 0);
830 mmu->utlb_ctx[utlb] = IPMMU_CTX_INVALID;
833 arm_iommu_release_mapping(mmu->mapping);
838 struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
841 if (mmu->group)
842 return iommu_group_ref_get(mmu->group);
846 mmu->group = group;
875 static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
880 for (i = 0; i < mmu->num_ctx; ++i)
881 ipmmu_ctx_write(mmu, i, IMCTR, 0);
979 struct ipmmu_vmsa_device *mmu;
984 mmu = devm_kzalloc(&pdev->dev, sizeof(*mmu), GFP_KERNEL);
985 if (!mmu) {
990 mmu->dev = &pdev->dev;
991 spin_lock_init(&mmu->lock);
992 bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
993 mmu->features = of_device_get_match_data(&pdev->dev);
994 memset(mmu->utlb_ctx, IPMMU_CTX_INVALID, mmu->features->num_utlbs);
1001 mmu->base = devm_ioremap_resource(&pdev->dev, res);
1002 if (IS_ERR(mmu->base))
1003 return PTR_ERR(mmu->base);
1017 if (mmu->features->use_ns_alias_offset)
1018 mmu->base += IM_NS_ALIAS_OFFSET;
1020 mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts);
1026 if (!mmu->features->has_cache_leaf_nodes ||
1028 mmu->root = mmu;
1030 mmu->root = ipmmu_find_root();
1035 if (!mmu->root)
1039 if (ipmmu_is_root(mmu)) {
1045 dev_name(&pdev->dev), mmu);
1051 ipmmu_device_reset(mmu);
1053 if (mmu->features->reserved_context) {
1055 set_bit(0, mmu->ctx);
1064 if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
1065 ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
1070 ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1081 platform_set_drvdata(pdev, mmu);
1088 struct ipmmu_vmsa_device *mmu = platform_get_drvdata(pdev);
1090 iommu_device_sysfs_remove(&mmu->iommu);
1091 iommu_device_unregister(&mmu->iommu);
1093 arm_iommu_release_mapping(mmu->mapping);
1095 ipmmu_device_reset(mmu);
1101 struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
1105 if (ipmmu_is_root(mmu)) {
1106 ipmmu_device_reset(mmu);
1108 for (i = 0; i < mmu->num_ctx; i++) {
1109 if (!mmu->domains[i])
1112 ipmmu_domain_setup_context(mmu->domains[i]);
1117 for (i = 0; i < mmu->features->num_utlbs; i++) {
1118 if (mmu->utlb_ctx[i] == IPMMU_CTX_INVALID)
1121 ipmmu_utlb_enable(mmu->root->domains[mmu->utlb_ctx[i]], i);