Lines Matching defs:val

823 		pr_info("pte level: %d, pte value: 0x%016llx\n", level, pte->val);
889 pr_info("pasid dir entry: 0x%016llx\n", pde->val);
899 for (i = 0; i < ARRAY_SIZE(pte->val); i++)
900 pr_info("pasid table entry[%d]: 0x%016llx\n", i, pte->val[i]);
903 level = pte->val[2] & BIT_ULL(2) ? 5 : 4;
904 pgtable = phys_to_virt(pte->val[2] & VTD_PAGE_MASK);
906 level = agaw_to_level((pte->val[0] >> 2) & 0x7);
907 pgtable = phys_to_virt(pte->val[0] & VTD_PAGE_MASK);
952 if (cmpxchg64(&pte->val, 0ULL, pteval))
1242 u32 val;
1253 readl, (!(val & DMA_GSTS_WBFS)), val);
1263 u64 val = 0;
1268 val = DMA_CCMD_GLOBAL_INVL;
1271 val = DMA_CCMD_DOMAIN_INVL|DMA_CCMD_DID(did);
1274 val = DMA_CCMD_DEVICE_INVL|DMA_CCMD_DID(did)
1282 val |= DMA_CCMD_ICC;
1285 dmar_writeq(iommu->reg + DMAR_CCMD_REG, val);
1289 dmar_readq, (!(val & DMA_CCMD_ICC)), val);
1299 u64 val = 0, val_iva = 0;
1305 val = DMA_TLB_GLOBAL_FLUSH|DMA_TLB_IVT;
1308 val = DMA_TLB_DSI_FLUSH|DMA_TLB_IVT|DMA_TLB_DID(did);
1311 val = DMA_TLB_PSI_FLUSH|DMA_TLB_IVT|DMA_TLB_DID(did);
1322 val |= DMA_TLB_WRITE_DRAIN;
1328 dmar_writeq(iommu->reg + tlb_offset + 8, val);
1332 dmar_readq, (!(val & DMA_TLB_IVT)), val);
1337 if (DMA_TLB_IAIG(val) == 0)
1339 if (DMA_TLB_IAIG(val) != DMA_TLB_IIRG(type))
1342 (unsigned long long)DMA_TLB_IAIG(val));
2244 tmp = cmpxchg64_local(&pte->val, 0ULL, pteval);
2729 u64 val;
2732 val = virt_to_phys(ctxt_tbls[idx]) | 1;
2733 iommu->root_entry[bus].lo = val;
2739 val = virt_to_phys(ctxt_tbls[idx + 1]) | 1;
2740 iommu->root_entry[bus].hi = val;
3541 unsigned long val, void *v)
3548 switch (val) {