Lines Matching defs:device
41 #define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
258 int devices_cnt; /* target device count */
265 int devices_cnt; /* target device count */
274 int devices_cnt; /* target device count */
285 static void device_block_translation(struct device *dev);
338 pr_info("Disable GFX device mapping\n");
529 * There could possibly be multiple device numa nodes as devices
569 * If RHSA is missing, we should default to the device numa domain
633 * is_downstream_to_pci_bridge - test if a device belongs to the PCI
635 * @dev: candidate PCI device belonging to @bridge PCI sub-hierarchy
641 is_downstream_to_pci_bridge(struct device *dev, struct device *bridge)
665 /* We know that this device on this chipset has its own IOMMU.
667 * to us. Hope that the IOMMU for this device is actually
681 pr_warn_once(FW_BUG "BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device\n");
689 static bool iommu_is_dummy(struct intel_iommu *iommu, struct device *dev)
698 pdev->device == PCI_DEVICE_ID_INTEL_IOAT_SNB &&
706 struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn)
711 struct device *tmp;
1392 * The extra devTLB flush quirk impacts those QAT devices with PCI device
1403 if ((pdev->device & 0xfffc) != BUGGY_QAT_DEVID_MASK)
1419 the device if you enable PASID support after ATS support is
1570 * flush. However, device IOTLB doesn't need to be flushed in this case.
1958 * the newly-mapped device. For kdump, at this point, the device
2084 domain_context_mapping(struct dmar_domain *domain, struct device *dev)
2333 struct device *dev,
2365 static bool dev_is_real_dma_subdevice(struct device *dev)
2391 struct device *dev;
2446 struct device *dev)
2466 /* PASID table is mandatory for a PCI device in scalable mode. */
2499 * device_rmrr_is_relaxable - Test whether the RMRR of this device
2501 * @dev: device handle
2508 * any use of the RMRR regions will be torn down before assigning the device
2513 static bool device_rmrr_is_relaxable(struct device *dev)
2528 * Return the required default domain type for a specific device.
2530 * @dev: the device in query
2534 * - IOMMU_DOMAIN_DMA: device requires a dynamic mapping domain
2535 * - IOMMU_DOMAIN_IDENTITY: device requires an identical mapping domain
2536 * - 0: both identity and dynamic domains work for this device
2538 static int device_def_domain_type(struct device *dev)
2872 * this device
2917 struct device *dev;
2969 * this device
3206 struct device *dev;
3313 * we always have to disable PMRs or DMA may fail on this device
3394 struct device *tmp;
3419 struct device *tmp;
3428 * This device supports ATS as it is in SATC table.
3430 * automatically by HW for the device that requires
3431 * ATS, hence OS should not enable this device ATS
3438 /* If it's an integrated device, allow ATS */
3615 static inline struct intel_iommu *dev_to_intel_iommu(struct device *dev)
3622 static ssize_t version_show(struct device *dev,
3632 static ssize_t address_show(struct device *dev,
3640 static ssize_t cap_show(struct device *dev,
3648 static ssize_t ecap_show(struct device *dev,
3656 static ssize_t domains_supported_show(struct device *dev,
3664 static ssize_t domains_used_show(struct device *dev,
3733 struct device *dev;
3799 panic("tboot: Failed to initialize DMAR device scope\n");
3935 static void dmar_remove_one_dev_info(struct device *dev)
3961 * all DMA requests without PASID from the device are blocked. If the page
3964 static void device_block_translation(struct device *dev)
4012 struct device *dev)
4071 struct device *dev)
4111 struct device *dev)
4327 static bool intel_iommu_capable(struct device *dev, enum iommu_cap cap)
4344 static struct iommu_device *intel_iommu_probe_device(struct device *dev)
4380 * For IOMMU that supports device IOTLB throttling
4419 static void intel_iommu_release_device(struct device *dev)
4430 static void intel_iommu_probe_finalize(struct device *dev)
4436 static void intel_iommu_get_resv_regions(struct device *device,
4442 struct device *i_dev;
4453 if (i_dev != device &&
4454 !is_downstream_to_pci_bridge(device, i_dev))
4459 type = device_rmrr_is_relaxable(device) ?
4474 if (dev_is_pci(device)) {
4475 struct pci_dev *pdev = to_pci_dev(device);
4495 static struct iommu_group *intel_iommu_device_group(struct device *dev)
4502 static int intel_iommu_enable_sva(struct device *dev)
4521 * Devices having device-specific I/O fault handling should not
4523 * capability of device-specific IOPF. Therefore, IOMMU can only
4524 * default that if the device driver enables SVA on a non-PRI
4525 * device, it will handle IOPF in its own way.
4537 static int intel_iommu_enable_iopf(struct device *dev)
4585 static int intel_iommu_disable_iopf(struct device *dev)
4598 * the device driver has stopped DMA, all PASIDs have been
4606 * fault handler and removing device from iopf queue should never
4616 intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
4631 intel_iommu_dev_disable_feat(struct device *dev, enum iommu_dev_features feat)
4645 static bool intel_iommu_is_attach_deferred(struct device *dev)
4653 * Check that the device does not live on an external facing PCI port that is
4662 pdev->vendor, pdev->device);
4682 static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
4724 struct device *dev, ioasid_t pasid)
4777 static void *intel_iommu_hw_info(struct device *dev, u32 *length, u32 *type)
4915 /* we have to ensure the gfx device is idle before we flush */
4932 ver = (dev->device >> 8) & 0xff;
4947 ISOCH DMAR unit for the Azalia sound device, but not give it any
5016 * Here we deal with a device TLB defect where device may inadvertently issue ATS
5022 * under the control of the trusted/privileged host device driver must use this
5034 * For #1 and #2, device drivers are responsible for stopping DMA traffic