Lines Matching refs:pgtbl_cfg
455 struct io_pgtable_cfg *pgtbl_cfg)
466 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr;
468 cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg);
469 cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg);
476 cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg);
482 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr;
490 if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1)
491 cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;
493 cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;
496 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr;
502 cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr;
503 cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr;
505 cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair;
506 cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair >> 32;
617 struct io_pgtable_cfg pgtbl_cfg;
748 pgtbl_cfg = (struct io_pgtable_cfg) {
758 ret = smmu->impl->init_context(smmu_domain, &pgtbl_cfg, dev);
764 pgtbl_cfg.quirks |= smmu_domain->pgtbl_quirks;
766 pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain);
773 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
775 if (pgtbl_cfg.quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) {
785 arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg);