Lines Matching defs:smmu_domain
62 struct arm_smmu_domain *smmu_domain = (void *)cookie;
63 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
64 struct arm_smmu_device *smmu = smmu_domain->smmu;
77 struct arm_smmu_domain *smmu_domain = (void *)cookie;
78 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
79 struct qcom_smmu *qsmmu = to_qcom_smmu(smmu_domain->smmu);
89 struct arm_smmu_domain *smmu_domain = (void *)cookie;
90 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
91 struct arm_smmu_device *smmu = smmu_domain->smmu;
124 struct arm_smmu_domain *smmu_domain = (void *)cookie;
126 io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops);
139 struct arm_smmu_domain *smmu_domain = (void *)cookie;
140 struct io_pgtable *pgtable = io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops);
141 struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
142 struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx];
172 arm_smmu_write_context_bank(smmu_domain->smmu, cb->cfg->cbndx);
177 static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain,
208 static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
213 smmu_domain->cfg.flush_walk_prefer_tlbiasid = true;
224 if (qcom_adreno_can_do_ttbr1(smmu_domain->smmu) &&
225 (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) &&
226 (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64))
234 priv->cookie = smmu_domain;
264 static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain,
267 smmu_domain->cfg.flush_walk_prefer_tlbiasid = true;