Lines Matching refs:smmu
12 #include "arm-smmu.h"
35 struct arm_smmu_device smmu;
41 static inline struct nvidia_smmu *to_nvidia_smmu(struct arm_smmu_device *smmu)
43 return container_of(smmu, struct nvidia_smmu, smmu);
46 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
51 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu);
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
55 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu,
58 void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset;
63 static void nvidia_smmu_write_reg(struct arm_smmu_device *smmu,
66 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
70 void __iomem *reg = nvidia_smmu_page(smmu, i, page) + offset;
76 static u64 nvidia_smmu_read_reg64(struct arm_smmu_device *smmu,
79 void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset;
84 static void nvidia_smmu_write_reg64(struct arm_smmu_device *smmu,
87 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
91 void __iomem *reg = nvidia_smmu_page(smmu, i, page) + offset;
97 static void nvidia_smmu_tlb_sync(struct arm_smmu_device *smmu, int page,
100 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
103 arm_smmu_writel(smmu, page, sync, 0);
115 reg = nvidia_smmu_page(smmu, i, page) + status;
128 dev_err_ratelimited(smmu->dev,
132 static int nvidia_smmu_reset(struct arm_smmu_device *smmu)
134 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
139 void __iomem *reg = nvidia_smmu_page(smmu, i, ARM_SMMU_GR0) +
151 struct arm_smmu_device *smmu,
155 void __iomem *gr0_base = nvidia_smmu_page(smmu, inst, 0);
165 dev_err_ratelimited(smmu->dev,
167 dev_err_ratelimited(smmu->dev,
179 struct arm_smmu_device *smmu = dev;
180 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
185 irq_ret = nvidia_smmu_global_fault_inst(irq, smmu, inst);
194 struct arm_smmu_device *smmu,
199 void __iomem *gr1_base = nvidia_smmu_page(smmu, inst, 1);
200 void __iomem *cb_base = nvidia_smmu_page(smmu, inst, smmu->numpage + idx);
210 dev_err_ratelimited(smmu->dev,
223 struct arm_smmu_device *smmu;
229 smmu = smmu_domain->smmu;
230 nvidia = to_nvidia_smmu(smmu);
239 for (idx = 0; idx < smmu->num_context_banks; idx++) {
240 irq_ret = nvidia_smmu_context_fault_bank(irq, smmu,
250 static void nvidia_smmu_probe_finalize(struct arm_smmu_device *smmu, struct device *dev)
252 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu);
257 dev_err(smmu->dev, "memory controller probe failed for %s: %d\n",
265 struct arm_smmu_device *smmu = smmu_domain->smmu;
266 const struct device_node *np = smmu->dev->of_node;
280 if (of_device_is_compatible(np, "nvidia,tegra234-smmu") ||
281 of_device_is_compatible(np, "nvidia,tegra194-smmu")) {
282 smmu->pgsize_bitmap = PAGE_SIZE;
283 pgtbl_cfg->pgsize_bitmap = smmu->pgsize_bitmap;
307 struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
310 struct device *dev = smmu->dev;
315 nvidia_smmu = devm_krealloc(dev, smmu, sizeof(*nvidia_smmu), GFP_KERNEL);
323 /* Instance 0 is ioremapped by arm-smmu.c. */
324 nvidia_smmu->bases[0] = smmu->base;
340 nvidia_smmu->smmu.impl = &nvidia_smmu_single_impl;
342 nvidia_smmu->smmu.impl = &nvidia_smmu_impl;
344 return &nvidia_smmu->smmu;