Lines Matching defs:cons
106 u32 space, prod, cons;
109 cons = Q_IDX(q, q->cons);
111 if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons))
112 space = (1 << q->max_n_shift) - (prod - cons);
114 space = cons - prod;
121 return Q_IDX(q, q->prod) == Q_IDX(q, q->cons) &&
122 Q_WRP(q, q->prod) != Q_WRP(q, q->cons);
127 return Q_IDX(q, q->prod) == Q_IDX(q, q->cons) &&
128 Q_WRP(q, q->prod) == Q_WRP(q, q->cons);
133 return ((Q_WRP(q, q->cons) == Q_WRP(q, prod)) &&
134 (Q_IDX(q, q->cons) > Q_IDX(q, prod))) ||
135 ((Q_WRP(q, q->cons) != Q_WRP(q, prod)) &&
136 (Q_IDX(q, q->cons) <= Q_IDX(q, prod)));
143 * are complete before we update the cons pointer.
146 writel_relaxed(q->llq.cons, q->cons_reg);
151 u32 cons = (Q_WRP(q, q->cons) | Q_IDX(q, q->cons)) + 1;
152 q->cons = Q_OVF(q->cons) | Q_WRP(q, cons) | Q_IDX(q, cons);
159 if (likely(Q_OVF(llq->prod) == Q_OVF(llq->cons)))
162 llq->cons = Q_OVF(llq->prod) | Q_WRP(llq, llq->cons) |
163 Q_IDX(llq, llq->cons);
240 queue_read(ent, Q_ENT(q, q->llq.cons), q->ent_dwords);
384 u32 cons = readl_relaxed(q->cons_reg);
385 u32 idx = FIELD_GET(CMDQ_CONS_ERR, cons);
390 dev_err(smmu->dev, "CMDQ error (cons 0x%08x): %s\n", cons,
416 queue_read(cmd, Q_ENT(q, cons), q->ent_dwords);
424 queue_write(Q_ENT(q, cons), cmd, q->ent_dwords);
525 * b. Otherwise, we spin waiting for the hardware cons pointer to
602 * Try to update our copy of cons by grabbing exclusive cmdq access. If
606 WRITE_ONCE(cmdq->q.llq.cons, readl_relaxed(cmdq->q.cons_reg));
644 llq->cons = ret ? llq->prod : queue_inc_prod_n(llq, 1);
649 * Wait until the SMMU cons index passes llq->prod.
676 * cmdq->q.llq.cons. Roughly speaking:
696 llq->cons = readl(cmdq->q.cons_reg);
770 head.cons = llq.cons;
852 * reader, in which case we can safely update cmdq->q.llq.cons
855 WRITE_ONCE(cmdq->q.llq.cons, llq.cons);
2929 q->llq.prod = q->llq.cons = 0;
3341 writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS);
3367 writel_relaxed(smmu->evtq.q.llq.cons, smmu->page1 + ARM_SMMU_EVTQ_CONS);
3383 writel_relaxed(smmu->priq.q.llq.cons,