Lines Matching defs:sid
144 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))
146 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
147 (((dart)->hw->ttbr_count * (sid)) << 2) + \
242 * @sid stream id bitmap
309 int sid;
311 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
312 writel(dart->hw->tcr_enabled, dart->regs + DART_TCR(dart, sid));
318 int sid;
320 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
321 writel(dart->hw->tcr_disabled, dart->regs + DART_TCR(dart, sid));
328 int sid;
331 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
333 dart->regs + DART_TCR(dart, sid));
340 int sid;
343 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
346 dart->regs + DART_TTBR(dart, sid, idx));
353 int sid;
355 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
356 writel(0, dart->regs + DART_TTBR(dart, sid, idx));
405 int sid;
409 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) {
411 FIELD_PREP(DART_T8110_TLB_CMD_STREAM, sid);
429 command, sid);
757 int i, sid;
761 sid = args->args[0];
781 set_bit(sid, cfg->stream_maps[i].sidmap);
788 set_bit(sid, cfg->stream_maps[i].sidmap);
800 int i, sid;
807 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
808 stream_map->dart->sid2group[sid] = NULL;
839 int i, sid;
849 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) {
851 stream_map->dart->sid2group[sid];
902 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
903 stream_map->dart->sid2group[sid] = group;
1244 unsigned int sid, idx;
1246 for (sid = 0; sid < dart->num_streams; sid++) {
1247 dart->save_tcr[sid] = readl_relaxed(dart->regs + DART_TCR(dart, sid));
1249 dart->save_ttbr[sid][idx] =
1250 readl(dart->regs + DART_TTBR(dart, sid, idx));
1259 unsigned int sid, idx;
1268 for (sid = 0; sid < dart->num_streams; sid++) {
1270 writel(dart->save_ttbr[sid][idx],
1271 dart->regs + DART_TTBR(dart, sid, idx));
1272 writel(dart->save_tcr[sid], dart->regs + DART_TCR(dart, sid));