Lines Matching defs:dev_data
187 struct iommu_dev_data *dev_data;
190 dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL);
191 if (!dev_data)
194 spin_lock_init(&dev_data->lock);
195 dev_data->devid = devid;
196 ratelimit_default_init(&dev_data->rs);
198 llist_add(&dev_data->dev_data_list, &pci_seg->dev_data_list);
199 return dev_data;
204 struct iommu_dev_data *dev_data;
212 llist_for_each_entry(dev_data, node, dev_data_list) {
213 if (dev_data->devid == devid)
214 return dev_data;
284 struct iommu_dev_data *dev_data;
286 dev_data = search_dev_data(iommu, devid);
288 if (dev_data == NULL) {
289 dev_data = alloc_dev_data(iommu, devid);
290 if (!dev_data)
294 dev_data->defer_attach = true;
297 return dev_data;
377 struct iommu_dev_data *dev_data;
388 dev_data = find_dev_data(iommu, devid);
389 if (!dev_data)
392 dev_data->dev = dev;
403 dev_data->iommu_v2 = iommu->is_iommu_v2;
406 dev_iommu_priv_set(dev, dev_data);
430 struct iommu_dev_data *dev_data;
432 dev_data = dev_iommu_priv_get(dev);
433 if (!dev_data)
436 if (dev_data->domain)
442 * We keep dev_data around for unplugged devices and reuse it when the
473 struct iommu_dev_data *dev_data = NULL;
486 dev_data = dev_iommu_priv_get(&pdev->dev);
488 if (dev_data) {
489 if (__ratelimit(&dev_data->rs)) {
505 struct iommu_dev_data *dev_data = NULL;
519 dev_data = dev_iommu_priv_get(&pdev->dev);
521 if (dev_data) {
522 if (__ratelimit(&dev_data->rs)) {
546 struct iommu_dev_data *dev_data = NULL;
552 dev_data = dev_iommu_priv_get(&pdev->dev);
554 if (dev_data) {
562 if (dev_data->domain == NULL) {
570 if (!report_iommu_fault(&dev_data->domain->domain,
578 if (__ratelimit(&dev_data->rs)) {
1313 static int device_flush_iotlb(struct iommu_dev_data *dev_data,
1320 qdep = dev_data->ats.qdep;
1321 iommu = rlookup_amd_iommu(dev_data->dev);
1325 build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size);
1340 static int device_flush_dte(struct iommu_dev_data *dev_data)
1348 iommu = rlookup_amd_iommu(dev_data->dev);
1352 if (dev_is_pci(dev_data->dev))
1353 pdev = to_pci_dev(dev_data->dev);
1359 ret = iommu_flush_dte(iommu, dev_data->devid);
1364 alias = pci_seg->alias_table[dev_data->devid];
1365 if (alias != dev_data->devid) {
1371 if (dev_data->ats.enabled)
1372 ret = device_flush_iotlb(dev_data, 0, ~0UL);
1385 struct iommu_dev_data *dev_data;
1402 list_for_each_entry(dev_data, &domain->dev_list, list) {
1404 if (!dev_data->ats.enabled)
1407 ret |= device_flush_iotlb(dev_data, address, size);
1498 struct iommu_dev_data *dev_data;
1500 list_for_each_entry(dev_data, &domain->dev_list, list)
1501 device_flush_dte(dev_data);
1679 static void do_attach(struct iommu_dev_data *dev_data,
1685 iommu = rlookup_amd_iommu(dev_data->dev);
1688 ats = dev_data->ats.enabled;
1691 dev_data->domain = domain;
1692 list_add(&dev_data->list, &domain->dev_list);
1696 domain->nid = dev_to_node(dev_data->dev);
1703 set_dte_entry(iommu, dev_data->devid, domain,
1704 ats, dev_data->iommu_v2);
1705 clone_aliases(iommu, dev_data->dev);
1707 device_flush_dte(dev_data);
1710 static void do_detach(struct iommu_dev_data *dev_data)
1712 struct protection_domain *domain = dev_data->domain;
1715 iommu = rlookup_amd_iommu(dev_data->dev);
1720 dev_data->domain = NULL;
1721 list_del(&dev_data->list);
1722 clear_dte_entry(iommu, dev_data->devid);
1723 clone_aliases(iommu, dev_data->dev);
1726 device_flush_dte(dev_data);
1788 struct iommu_dev_data *dev_data;
1795 dev_data = dev_iommu_priv_get(dev);
1797 spin_lock(&dev_data->lock);
1800 if (dev_data->domain != NULL)
1822 if (dev_data->iommu_v2) {
1826 dev_data->ats.enabled = true;
1827 dev_data->ats.qdep = pci_ats_queue_depth(pdev);
1828 dev_data->pri_tlp = pci_prg_resp_pasid_required(pdev);
1832 dev_data->ats.enabled = true;
1833 dev_data->ats.qdep = pci_ats_queue_depth(pdev);
1839 do_attach(dev_data, domain);
1851 spin_unlock(&dev_data->lock);
1864 struct iommu_dev_data *dev_data;
1867 dev_data = dev_iommu_priv_get(dev);
1868 domain = dev_data->domain;
1872 spin_lock(&dev_data->lock);
1880 if (WARN_ON(!dev_data->domain))
1883 do_detach(dev_data);
1888 if (domain->flags & PD_IOMMUV2_MASK && dev_data->iommu_v2)
1890 else if (dev_data->ats.enabled)
1893 dev_data->ats.enabled = false;
1896 spin_unlock(&dev_data->lock);
1975 struct iommu_dev_data *dev_data;
1977 list_for_each_entry(dev_data, &domain->dev_list, list) {
1978 struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev);
1982 set_dte_entry(iommu, dev_data->devid, domain,
1983 dev_data->ats.enabled, dev_data->iommu_v2);
1984 clone_aliases(iommu, dev_data->dev);
2203 struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
2212 if (dev_data->domain == domain)
2215 dev_data->defer_attach = false;
2217 if (dev_data->domain)
2225 dev_data->use_vapic = 1;
2227 dev_data->use_vapic = 0;
2405 struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
2407 return dev_data->defer_attach;
2436 struct iommu_dev_data *dev_data;
2438 dev_data = dev_iommu_priv_get(dev);
2439 if (!dev_data)
2449 if (dev_data->iommu_v2 &&
2578 struct iommu_dev_data *dev_data;
2604 list_for_each_entry(dev_data, &domain->dev_list, list) {
2612 if (!dev_data->ats.enabled)
2615 qdep = dev_data->ats.qdep;
2616 iommu = rlookup_amd_iommu(dev_data->dev);
2619 build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid,
2775 struct iommu_dev_data *dev_data;
2779 dev_data = dev_iommu_priv_get(&pdev->dev);
2784 build_complete_ppr(&cmd, dev_data->devid, pasid, status,
2785 tag, dev_data->pri_tlp);
3610 struct iommu_dev_data *dev_data;
3615 dev_data = search_dev_data(ir_data->iommu, irte_info->devid);
3621 if (!dev_data || !dev_data->use_vapic)