Lines Matching refs:ret
1320 int i, ret;
1323 ret = add_special_device(IVHD_SPECIAL_IOAPIC,
1327 if (ret)
1328 return ret;
1332 ret = add_special_device(IVHD_SPECIAL_HPET,
1336 if (ret)
1337 return ret;
1341 ret = add_acpi_hid_device(early_acpihid_map[i].hid,
1345 if (ret)
1346 return ret;
1367 int ret;
1370 ret = add_early_maps();
1371 if (ret)
1372 return ret;
1519 int ret;
1538 ret = add_special_device(type, handle, &devid, false);
1539 if (ret)
1540 return ret;
1555 int ret;
1604 ret = add_acpi_hid_device(hid, uid, &devid, false);
1605 if (ret)
1606 return ret;
1868 int ret;
1892 ret = amd_iommu_create_irq_domain(iommu);
1893 if (ret)
1894 return ret;
1941 int ret;
1963 ret = init_iommu_one(iommu, h, table);
1964 if (ret)
1965 return ret;
1977 ret = init_iommu_one_late(iommu);
1978 if (ret)
1979 return ret;
2076 int ret;
2180 ret = iommu_device_sysfs_add(&iommu->iommu, &iommu->dev->dev,
2182 if (ret)
2183 return ret;
2236 int ret;
2239 ret = iommu_init_pci(iommu);
2240 if (ret) {
2242 iommu->index, ret);
2268 return ret;
2334 int i, ret;
2339 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
2340 if (ret < 0)
2341 return ret;
2352 return ret;
2389 int ret;
2391 ret = parent->chip->irq_set_affinity(parent, mask, force);
2392 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
2393 return ret;
2449 int irq, ret;
2467 ret = request_threaded_irq(irq, amd_iommu_int_handler,
2469 if (ret) {
2472 return ret;
2480 int ret;
2484 ret = __iommu_setup_intcapxt(iommu, iommu->evt_irq_name,
2487 if (ret)
2488 return ret;
2492 ret = __iommu_setup_intcapxt(iommu, iommu->ppr_irq_name,
2495 if (ret)
2496 return ret;
2501 ret = __iommu_setup_intcapxt(iommu, iommu->ga_irq_name,
2506 return ret;
2511 int ret;
2517 ret = iommu_setup_intcapxt(iommu);
2519 ret = iommu_setup_msi(iommu);
2521 ret = -ENODEV;
2523 if (ret)
2524 return ret;
3010 bool ret, has_sb_ioapic;
3014 ret = false;
3031 ret = false;
3034 ret = true;
3050 if (!ret)
3053 return ret;
3100 int remap_cache_sz, ret;
3119 ret = check_ivrs_checksum(ivrs_base);
3120 if (ret)
3129 ret = -ENOMEM;
3147 ret = init_iommu_all(ivrs_base);
3148 if (ret)
3169 ret = -ENOMEM;
3187 ret = init_memory_definitions(ivrs_base);
3188 if (ret)
3198 return ret;
3204 int ret = 0;
3207 ret = iommu_init_irq(iommu);
3208 if (ret)
3220 return ret;
3269 int ret = 0;
3275 ret = -ENODEV;
3283 ret = -EINVAL;
3285 ret = early_amd_iommu_init();
3286 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_ACPI_FINISHED;
3296 ret = amd_iommu_init_pci();
3297 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
3300 ret = amd_iommu_enable_interrupts();
3301 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
3313 ret = -EINVAL;
3320 if (ret) {
3336 return ret;
3341 int ret = -EINVAL;
3348 ret = state_next();
3351 return ret;
3357 int ret;
3361 ret = iommu_go_to_state(IOMMU_ACPI_FINISHED);
3362 if (ret) {
3364 return ret;
3372 int ret;
3374 ret = iommu_go_to_state(IOMMU_ENABLED);
3375 if (ret)
3376 return ret;
3409 int ret;
3411 ret = iommu_go_to_state(IOMMU_INITIALIZED);
3413 if (ret && list_empty(&amd_iommu_list)) {
3425 return ret;
3456 int ret;
3464 ret = iommu_go_to_state(IOMMU_IVRS_DETECTED);
3465 if (ret)
3466 return ret;