Lines Matching refs:tsc
103 static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
111 reinit_completion(&tsc->completion);
113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
118 if (tsc->average_enable) {
120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
133 if (tsc->average_enable)
135 writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
138 (&tsc->completion, ADC_TIMEOUT);
140 dev_err(tsc->dev, "Timeout for adc calibration\n");
144 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
146 dev_err(tsc->dev, "ADC calibration failed\n");
151 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
153 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
163 static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
168 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
171 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
174 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
177 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
180 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
188 static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
193 basic_setting |= tsc->measure_delay_time << 8;
195 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
197 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
199 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
200 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
202 tsc->tsc_regs + REG_TSC_INT_SIG_EN);
205 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
208 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
211 static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
215 err = imx6ul_adc_init(tsc);
218 imx6ul_tsc_channel_config(tsc);
219 imx6ul_tsc_set(tsc);
224 static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
230 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
232 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
235 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
237 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
241 static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
252 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
262 struct imx6ul_tsc *tsc = dev_id;
268 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
272 tsc->tsc_regs + REG_TSC_INT_STATUS);
275 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
277 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
280 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
288 if (!tsc_wait_detect_mode(tsc) ||
289 gpiod_get_value_cansleep(tsc->xnur_gpio)) {
290 input_report_key(tsc->input, BTN_TOUCH, 1);
291 input_report_abs(tsc->input, ABS_X, x);
292 input_report_abs(tsc->input, ABS_Y, y);
294 input_report_key(tsc->input, BTN_TOUCH, 0);
297 input_sync(tsc->input);
305 struct imx6ul_tsc *tsc = dev_id;
308 coco = readl(tsc->adc_regs + REG_ADC_HS);
310 readl(tsc->adc_regs + REG_ADC_R0);
311 complete(&tsc->completion);
317 static int imx6ul_tsc_start(struct imx6ul_tsc *tsc)
321 err = clk_prepare_enable(tsc->adc_clk);
323 dev_err(tsc->dev,
329 err = clk_prepare_enable(tsc->tsc_clk);
331 dev_err(tsc->dev,
332 "Could not prepare or enable the tsc clock: %d\n",
337 err = imx6ul_tsc_init(tsc);
344 clk_disable_unprepare(tsc->tsc_clk);
346 clk_disable_unprepare(tsc->adc_clk);
350 static void imx6ul_tsc_stop(struct imx6ul_tsc *tsc)
352 imx6ul_tsc_disable(tsc);
354 clk_disable_unprepare(tsc->tsc_clk);
355 clk_disable_unprepare(tsc->adc_clk);
361 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
363 return imx6ul_tsc_start(tsc);
368 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
370 imx6ul_tsc_stop(tsc);
376 struct imx6ul_tsc *tsc;
383 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
384 if (!tsc)
401 input_set_drvdata(input_dev, tsc);
403 tsc->dev = &pdev->dev;
404 tsc->input = input_dev;
405 init_completion(&tsc->completion);
407 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
408 if (IS_ERR(tsc->xnur_gpio)) {
409 err = PTR_ERR(tsc->xnur_gpio);
415 tsc->tsc_regs = devm_platform_ioremap_resource(pdev, 0);
416 if (IS_ERR(tsc->tsc_regs)) {
417 err = PTR_ERR(tsc->tsc_regs);
418 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
422 tsc->adc_regs = devm_platform_ioremap_resource(pdev, 1);
423 if (IS_ERR(tsc->adc_regs)) {
424 err = PTR_ERR(tsc->adc_regs);
429 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
430 if (IS_ERR(tsc->tsc_clk)) {
431 err = PTR_ERR(tsc->tsc_clk);
432 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
436 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
437 if (IS_ERR(tsc->adc_clk)) {
438 err = PTR_ERR(tsc->adc_clk);
451 err = devm_request_threaded_irq(tsc->dev, tsc_irq,
453 dev_name(&pdev->dev), tsc);
456 "failed requesting tsc irq %d: %d\n",
461 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
462 dev_name(&pdev->dev), tsc);
471 &tsc->measure_delay_time);
473 tsc->measure_delay_time = 0xffff;
476 &tsc->pre_charge_time);
478 tsc->pre_charge_time = 0xfff;
487 tsc->average_enable = false;
488 tsc->average_select = 0; /* value unused; initialize anyway */
494 tsc->average_enable = true;
495 tsc->average_select = ilog2(average_samples) - 2;
504 err = input_register_device(tsc->input);
511 platform_set_drvdata(pdev, tsc);
518 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
519 struct input_dev *input_dev = tsc->input;
524 imx6ul_tsc_stop(tsc);
534 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
535 struct input_dev *input_dev = tsc->input;
541 retval = imx6ul_tsc_start(tsc);
552 { .compatible = "fsl,imx6ul-tsc", },
559 .name = "imx6ul-tsc",