Lines Matching defs:start
130 /* start ADC calibration */
191 u32 start;
204 /* start sense detection */
205 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
206 start |= START_SENSE;
207 start &= ~TSC_DISABLE;
208 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
266 u32 start;
274 /* It's a HW self-clean bit. Set this bit and start sense detection */
275 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
276 start |= START_SENSE;
277 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);