Lines Matching refs:reg_grps
304 struct iqs7222_reg_grp_desc reg_grps[IQS7222_NUM_REG_GRPS];
317 .reg_grps = {
375 .reg_grps = {
429 .reg_grps = {
471 .reg_grps = {
518 .reg_grps = {
575 .reg_grps = {
631 .reg_grps = {
687 .reg_grps = {
743 .reg_grps = {
1843 u16 reg = dev_desc->reg_grps[IQS7222_REG_GRP_FILT].base + 1;
1882 int num_row = dev_desc->reg_grps[i].num_row;
1883 int num_col = dev_desc->reg_grps[i].num_col;
1884 u16 reg = dev_desc->reg_grps[i].base;
2001 int num_gpio = dev_desc->reg_grps[IQS7222_REG_GRP_GPIO].num_row;
2252 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2269 if (dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_col > 4 &&
2326 } else if (dev_desc->reg_grps[IQS7222_REG_GRP_TPAD].num_row &&
2402 u16 *setup = dev_desc->reg_grps
2456 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2682 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2854 const struct iqs7222_reg_grp_desc *reg_grps = dev_desc->reg_grps;
2864 for (i = 0; i < reg_grps[IQS7222_REG_GRP_GPIO].num_row; i++) {
2871 if (reg_grps[IQS7222_REG_GRP_GPIO].num_row == 1)
2884 for (i = 0; i < reg_grps[IQS7222_REG_GRP_CHAN].num_row; i++) {
2893 for (i = 0; i < reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
2900 for (j = 0; j < reg_grps[i].num_row; j++) {
2914 int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2915 int num_stat = dev_desc->reg_grps[IQS7222_REG_GRP_STAT].num_col;
2964 for (i = 0; i < dev_desc->reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
3009 for (i = 0; i < dev_desc->reg_grps[IQS7222_REG_GRP_TPAD].num_row; i++) {