Lines Matching refs:kbc
143 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
165 keycodes[num_down] = kbc->keycode[scancode];
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
182 if (kbc->use_ghost_filter && num_down >= 3) {
210 scancodes[i] += kbc->max_keys;
211 keycodes[i] = kbc->keycode[scancodes[i]];
219 tegra_kbc_report_released_keys(kbc->idev,
220 kbc->current_keys, kbc->num_pressed_keys,
222 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
223 input_sync(kbc->idev);
225 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
226 kbc->num_pressed_keys = num_down;
229 static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
233 val = readl(kbc->mmio + KBC_CONTROL_0);
238 writel(val, kbc->mmio + KBC_CONTROL_0);
243 struct tegra_kbc *kbc = from_timer(kbc, t, timer);
248 spin_lock_irqsave(&kbc->lock, flags);
250 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
254 tegra_kbc_report_keys(kbc);
260 dly = (val == 1) ? kbc->repoll_dly : 1;
261 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
264 for (i = 0; i < kbc->num_pressed_keys; i++)
265 input_report_key(kbc->idev, kbc->current_keys[i], 0);
266 input_sync(kbc->idev);
268 kbc->num_pressed_keys = 0;
271 tegra_kbc_set_fifo_interrupt(kbc, true);
274 spin_unlock_irqrestore(&kbc->lock, flags);
279 struct tegra_kbc *kbc = args;
283 spin_lock_irqsave(&kbc->lock, flags);
289 val = readl(kbc->mmio + KBC_INT_0);
290 writel(val, kbc->mmio + KBC_INT_0);
297 tegra_kbc_set_fifo_interrupt(kbc, false);
298 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
301 kbc->keypress_caused_wake = true;
304 spin_unlock_irqrestore(&kbc->lock, flags);
309 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
315 rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
317 for (i = 0; i < kbc->hw_support->max_rows; i++)
318 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
321 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
332 u32 row_cfg = readl(kbc->mmio + r_offs);
333 u32 col_cfg = readl(kbc->mmio + c_offs);
338 switch (kbc->pin_cfg[i].type) {
340 row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft;
344 col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft;
351 writel(row_cfg, kbc->mmio + r_offs);
352 writel(col_cfg, kbc->mmio + c_offs);
356 static int tegra_kbc_start(struct tegra_kbc *kbc)
362 ret = clk_prepare_enable(kbc->clk);
367 reset_control_assert(kbc->rst);
369 reset_control_deassert(kbc->rst);
372 tegra_kbc_config_pins(kbc);
373 tegra_kbc_setup_wakekeys(kbc, false);
375 writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
378 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
383 writel(val, kbc->mmio + KBC_CONTROL_0);
389 val = readl(kbc->mmio + KBC_INIT_DLY_0);
390 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
392 kbc->num_pressed_keys = 0;
399 val = readl(kbc->mmio + KBC_INT_0);
404 val = readl(kbc->mmio + KBC_KP_ENT0_0);
405 val = readl(kbc->mmio + KBC_KP_ENT1_0);
407 writel(0x7, kbc->mmio + KBC_INT_0);
409 enable_irq(kbc->irq);
414 static void tegra_kbc_stop(struct tegra_kbc *kbc)
419 spin_lock_irqsave(&kbc->lock, flags);
420 val = readl(kbc->mmio + KBC_CONTROL_0);
422 writel(val, kbc->mmio + KBC_CONTROL_0);
423 spin_unlock_irqrestore(&kbc->lock, flags);
425 disable_irq(kbc->irq);
426 del_timer_sync(&kbc->timer);
428 clk_disable_unprepare(kbc->clk);
433 struct tegra_kbc *kbc = input_get_drvdata(dev);
435 return tegra_kbc_start(kbc);
440 struct tegra_kbc *kbc = input_get_drvdata(dev);
442 return tegra_kbc_stop(kbc);
445 static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
453 const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i];
457 if (pin_cfg->num >= kbc->hw_support->max_rows) {
458 dev_err(kbc->dev,
467 if (pin_cfg->num >= kbc->hw_support->max_columns) {
468 dev_err(kbc->dev,
479 dev_err(kbc->dev,
489 static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
491 struct device_node *np = kbc->dev->of_node;
502 kbc->debounce_cnt = prop;
505 kbc->repeat_cnt = prop;
507 kbc->use_ghost_filter = of_property_present(np, "nvidia,needs-ghost-filter");
511 kbc->wakeup = true;
513 if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) {
514 dev_err(kbc->dev, "property nvidia,kbc-row-pins not found\n");
519 if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) {
520 dev_err(kbc->dev, "property nvidia,kbc-col-pins not found\n");
525 if (num_rows > kbc->hw_support->max_rows) {
526 dev_err(kbc->dev,
531 if (num_cols > kbc->hw_support->max_columns) {
532 dev_err(kbc->dev,
538 dev_err(kbc->dev, "property linux,keymap not found\n");
543 dev_err(kbc->dev,
549 for (i = 0; i < kbc->num_rows_and_columns; i++)
550 kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
552 ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins",
555 dev_err(kbc->dev, "Rows configurations are not proper\n");
559 ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins",
562 dev_err(kbc->dev, "Cols configurations are not proper\n");
567 kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW;
568 kbc->pin_cfg[rows_cfg[i]].num = i;
572 kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL;
573 kbc->pin_cfg[cols_cfg[i]].num = i;
590 { .compatible = "nvidia,tegra114-kbc", .data = &tegra11_kbc_hw_support},
591 { .compatible = "nvidia,tegra30-kbc", .data = &tegra20_kbc_hw_support},
592 { .compatible = "nvidia,tegra20-kbc", .data = &tegra20_kbc_hw_support},
599 struct tegra_kbc *kbc;
609 kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL);
610 if (!kbc) {
611 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
615 kbc->dev = &pdev->dev;
616 kbc->hw_support = match->data;
617 kbc->max_keys = kbc->hw_support->max_rows *
618 kbc->hw_support->max_columns;
619 kbc->num_rows_and_columns = kbc->hw_support->max_rows +
620 kbc->hw_support->max_columns;
621 keymap_rows = kbc->max_keys;
622 spin_lock_init(&kbc->lock);
624 err = tegra_kbc_parse_dt(kbc);
628 if (!tegra_kbc_check_pin_cfg(kbc, &num_rows))
631 kbc->irq = platform_get_irq(pdev, 0);
632 if (kbc->irq < 0)
635 kbc->idev = devm_input_allocate_device(&pdev->dev);
636 if (!kbc->idev) {
641 timer_setup(&kbc->timer, tegra_kbc_keypress_timer, 0);
643 kbc->mmio = devm_platform_ioremap_resource(pdev, 0);
644 if (IS_ERR(kbc->mmio))
645 return PTR_ERR(kbc->mmio);
647 kbc->clk = devm_clk_get(&pdev->dev, NULL);
648 if (IS_ERR(kbc->clk)) {
650 return PTR_ERR(kbc->clk);
653 kbc->rst = devm_reset_control_get(&pdev->dev, "kbc");
654 if (IS_ERR(kbc->rst)) {
656 return PTR_ERR(kbc->rst);
665 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
667 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt;
668 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
670 kbc->idev->name = pdev->name;
671 kbc->idev->id.bustype = BUS_HOST;
672 kbc->idev->dev.parent = &pdev->dev;
673 kbc->idev->open = tegra_kbc_open;
674 kbc->idev->close = tegra_kbc_close;
676 if (kbc->keymap_data && kbc->use_fn_map)
679 err = matrix_keypad_build_keymap(kbc->keymap_data, NULL,
681 kbc->hw_support->max_columns,
682 kbc->keycode, kbc->idev);
688 __set_bit(EV_REP, kbc->idev->evbit);
689 input_set_capability(kbc->idev, EV_MSC, MSC_SCAN);
691 input_set_drvdata(kbc->idev, kbc);
693 err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr,
695 pdev->name, kbc);
701 err = input_register_device(kbc->idev);
707 platform_set_drvdata(pdev, kbc);
708 device_init_wakeup(&pdev->dev, kbc->wakeup);
713 static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable)
717 val = readl(kbc->mmio + KBC_CONTROL_0);
722 writel(val, kbc->mmio + KBC_CONTROL_0);
728 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
730 mutex_lock(&kbc->idev->mutex);
732 disable_irq(kbc->irq);
733 del_timer_sync(&kbc->timer);
734 tegra_kbc_set_fifo_interrupt(kbc, false);
737 writel(0x7, kbc->mmio + KBC_INT_0);
742 kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
743 writel(0, kbc->mmio + KBC_TO_CNT_0);
745 tegra_kbc_setup_wakekeys(kbc, true);
748 kbc->keypress_caused_wake = false;
750 tegra_kbc_set_keypress_interrupt(kbc, true);
751 enable_irq(kbc->irq);
752 enable_irq_wake(kbc->irq);
754 if (input_device_enabled(kbc->idev))
755 tegra_kbc_stop(kbc);
757 mutex_unlock(&kbc->idev->mutex);
765 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
768 mutex_lock(&kbc->idev->mutex);
770 disable_irq_wake(kbc->irq);
771 tegra_kbc_setup_wakekeys(kbc, false);
773 tegra_kbc_set_keypress_interrupt(kbc, false);
776 writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
778 tegra_kbc_set_fifo_interrupt(kbc, true);
780 if (kbc->keypress_caused_wake && kbc->wakeup_key) {
788 input_report_key(kbc->idev, kbc->wakeup_key, 1);
789 input_sync(kbc->idev);
790 input_report_key(kbc->idev, kbc->wakeup_key, 0);
791 input_sync(kbc->idev);
794 if (input_device_enabled(kbc->idev))
795 err = tegra_kbc_start(kbc);
797 mutex_unlock(&kbc->idev->mutex);
808 .name = "tegra-kbc",
818 MODULE_ALIAS("platform:tegra-kbc");