Lines Matching refs:ctxt
224 * @ctxt: context number
231 enum qib_ureg regno, int ctxt)
239 dd->ureg_align * ctxt));
244 dd->ureg_align * ctxt));
252 * @ctxt: context
257 enum qib_ureg regno, u64 value, int ctxt)
264 dd->ureg_align * ctxt);
269 dd->ureg_align * ctxt);
276 * qib_write_kreg_ctxt - write a device's per-ctxt 64-bit kernel register
279 * @ctxt: the context containing the register
283 const u16 regno, unsigned ctxt,
286 qib_write_kreg(dd, regno + ctxt, value);
2181 * qib_7220_clear_tids - clear all TID entries for a ctxt, expected and eager
2183 * @rcd: the ctxt
2185 * clear all TID entries for a ctxt, expected and eager.
2195 u32 ctxt;
2201 ctxt = rcd->ctxt;
2207 ctxt * dd->rcvtidcnt * sizeof(*tidbase));
2240 * @rcd: the qlogic_ib ctxt
2299 * affects number of eager TIDs per ctxt (1K, 2K, 4K).
2705 qib_write_ureg(rcd->dd, ur_rcvegrindexhead, egrhd, rcd->ctxt);
2706 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt);
2713 head = qib_read_ureg32(rcd->dd, ur_rcvhdrhead, rcd->ctxt);
2717 tail = qib_read_ureg32(rcd->dd, ur_rcvhdrtail, rcd->ctxt);
2729 int ctxt)
2744 if (ctxt < 0)
2747 mask = (1ULL << ctxt);
2749 /* always done for specific ctxt */
2754 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt,
2755 dd->rcd[ctxt]->rcvhdrqtailaddr_phys);
2756 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt,
2757 dd->rcd[ctxt]->rcvhdrq_phys);
2758 dd->rcd[ctxt]->seq_cnt = 1;
2769 val = qib_read_ureg32(dd, ur_rcvhdrhead, ctxt) |
2771 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt);
2780 val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt);
2781 qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt);
2783 val = qib_read_ureg32(dd, ur_rcvhdrtail, ctxt);
2784 dd->rcd[ctxt]->head = val;
2786 if (ctxt < dd->first_user_ctxt)
2788 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt);
2791 if (ctxt >= 0) {
2792 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, 0);
2793 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, 0);
4114 * want to update before we actually run out, at low pbufs/ctxt
4350 if (!rcd->ctxt) {
4356 (rcd->ctxt - 1) * rcd->rcvegrcnt;