Lines Matching defs:val
1436 u64 val;
1447 val = ~0ULL; /* default to all hwerrors become interrupts, */
1449 val &= ~QLOGIC_IB_HWE_IB_UC_MEMORYPARITYERR;
1450 dd->cspec->hwerrmask = val;
1533 u64 val, prev_val, guid, ibc;
1569 val = ppd->cpspec->ibcctrl | (QLOGIC_IB_IBCC_LINKINITCMD_DISABLE <<
1571 qib_write_kreg(dd, kr_ibcctrl, val);
1614 val = qib_read_kreg64(dd, kr_xgxs_cfg);
1615 prev_val = val;
1616 val |= QLOGIC_IB_XGXS_FC_SAFE;
1617 if (val != prev_val) {
1618 qib_write_kreg(dd, kr_xgxs_cfg, val);
1621 if (val & QLOGIC_IB_XGXS_RESET)
1622 val &= ~QLOGIC_IB_XGXS_RESET;
1623 if (val != prev_val)
1624 qib_write_kreg(dd, kr_xgxs_cfg, val);
1648 u64 val;
1671 val = read_7220_creg32(dd, cr_ibsymbolerr);
1673 val -= val - ppd->cpspec->ibsymsnap;
1674 val -= ppd->cpspec->ibsymdelta;
1675 write_7220_creg(dd, cr_ibsymbolerr, val);
1678 val = read_7220_creg32(dd, cr_iblinkerrrecov);
1680 val -= val - ppd->cpspec->iblnkerrsnap;
1681 val -= ppd->cpspec->iblnkerrdelta;
1682 write_7220_creg(dd, cr_iblinkerrrecov, val);
1697 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg);
1698 val |= QLOGIC_IB_XGXS_RESET;
1699 qib_write_kreg(ppd->dd, kr_xgxs_cfg, val);
1728 u64 extctl, ledblink = 0, val, lst, ltst;
1744 val = qib_read_kreg64(dd, kr_ibcstatus);
1745 ltst = qib_7220_phys_portstate(val);
1746 lst = qib_7220_iblink_state(val);
2067 u64 val;
2094 val = dd->control | QLOGIC_IB_C_RESET;
2095 writeq(val, &dd->kregbase[kr_control]);
2112 val = readq(&dd->kregbase[kr_revision]);
2113 if (val == dd->revision) {
2406 static int qib_7220_set_ib_cfg(struct qib_pportdata *ppd, int which, u32 val)
2419 * caller puts LMC in 16MSbits, DLID in 16LSbits of val
2431 ppd->link_width_enabled = val;
2443 val--; /* convert from IB to chip */
2459 ppd->link_speed_enabled = val;
2461 !(val & (val - 1)))
2474 if (val == (QIB_IB_SDR | QIB_IB_DDR)) {
2475 val = IBA7220_IBC_SPEED_AUTONEG_MASK |
2481 val = val == QIB_IB_DDR ?
2503 if (maskr != val) {
2506 ppd->cpspec->ibcctrl |= (u64) val <<
2516 if (maskr != val) {
2519 ppd->cpspec->ibcctrl |= (u64) val <<
2535 if (val == IB_LINKINITCMD_POLL)
2553 val = (ppd->ibmaxlen >> 2) + 1;
2555 ppd->cpspec->ibcctrl |= (u64)val << SYM_LSB(IBCCtrl, MaxPktLen);
2561 switch (val & 0xffff0000) {
2584 qib_dev_err(dd, "bad linkcmd req 0x%x\n", val >> 16);
2587 switch (val & 0xffff) {
2616 val & 0xffff);
2645 if (val > IBA7220_IBC_HRTBT_MASK) {
2658 ppd->cpspec->ibcddrctrl |= (((u64) val & maskr) << lsb);
2673 u64 val, ddr;
2677 val = 0; /* disable heart beat, so link will come up */
2683 val = IBA7220_IBC_HRTBT_MASK << IBA7220_IBC_HRTBT_SHIFT;
2693 ppd->cpspec->ibcddrctrl = ddr | val;
2732 u64 mask, val;
2769 val = qib_read_ureg32(dd, ur_rcvhdrhead, ctxt) |
2771 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt);
2780 val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt);
2781 qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt);
2783 val = qib_read_ureg32(dd, ur_rcvhdrtail, ctxt);
2784 dd->rcd[ctxt]->head = val;
2787 val |= dd->rhdrhead_intr_off;
2788 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt);
3298 u64 val, prev_val;
3302 val = prev_val | QLOGIC_IB_XGXS_RESET;
3306 qib_write_kreg(dd, kr_xgxs_cfg, val);
3787 u64 val;
3800 val = qib_read_kreg64(dd, kr_sendpiosize);
3801 dd->piosize2k = val & ~0U;
3802 dd->piosize4k = val >> 32;
3809 val = qib_read_kreg64(dd, kr_sendpiobufcnt);
3810 dd->piobcnt2k = val & ~0U;
3811 dd->piobcnt4k = val >> 32;
3907 * New shadow val is bits we don't want to touch,
3937 u64 val;
3943 val = qib_read_kreg64(dd, kr_sendpioavailaddr);
3944 if (val != dd->pioavailregs_phys) {
3948 (unsigned long long) val);
4407 static void writescratch(struct qib_devdata *dd, u32 val)
4409 qib_write_kreg(dd, kr_scratch, val);