Lines Matching defs:enable
232 u64 extctrl; /* shadow the gpio output enable, etc... */
677 /* enable/disable chip from delivering interrupts */
678 static void qib_6120_set_intr_state(struct qib_devdata *dd, u32 enable)
680 if (enable) {
725 * and cancelling sends. Re-enable error interrupts before possible
1116 * qib_6120_init_hwerrors - enable hardware errors
1121 * we can enable hardware errors in the mask (potentially enabling
1122 * freeze mode), and enable hardware errors as errors (along with
1154 /* enable errors that are masked, at least this first time. */
1166 * Disable and enable the armlaunch error. Used for PIO bandwidth testing
1171 static void qib_set_6120_armlaunch(struct qib_devdata *dd, u32 enable)
1173 if (enable) {
1269 * Force reset on, also set rxdetect enable. Must do before reading
1381 /* enable counter writes */
1689 * enable interrupts on those bits so the interrupt routine
2142 * already from the enable, but since we don't
2726 case QIB_IB_CFG_HRTBT: /* Get Heartbeat off/enable/auto */