Lines Matching refs:wqe
228 struct mlx5r_umr_wqe *wqe, bool with_data)
259 mlx5r_memcpy_send_wqe(&qp->sq, &cur_edge, &seg, &size, wqe, wqe_size);
289 struct mlx5r_umr_wqe *wqe, bool with_data)
295 err = umr_check_mkey_mask(dev, be64_to_cpu(wqe->ctrl_seg.mkey_mask));
316 err = mlx5r_umr_post_send(umrc->qp, mkey, &umr_context.cqe, wqe,
361 struct mlx5r_umr_wqe wqe = {};
366 wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask();
367 wqe.ctrl_seg.mkey_mask |= get_umr_disable_mr_mask();
368 wqe.ctrl_seg.flags |= MLX5_UMR_INLINE;
370 MLX5_SET(mkc, &wqe.mkey_seg, free, 1);
371 MLX5_SET(mkc, &wqe.mkey_seg, pd, to_mpd(dev->umrc.pd)->pdn);
372 MLX5_SET(mkc, &wqe.mkey_seg, qpn, 0xffffff);
373 MLX5_SET(mkc, &wqe.mkey_seg, mkey_7_0,
376 return mlx5r_umr_post_send_wait(dev, mr->mmkey.key, &wqe, false);
401 struct mlx5r_umr_wqe wqe = {};
404 wqe.ctrl_seg.mkey_mask = get_umr_update_access_mask(dev);
405 wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask();
406 wqe.ctrl_seg.flags = MLX5_UMR_CHECK_FREE;
407 wqe.ctrl_seg.flags |= MLX5_UMR_INLINE;
409 mlx5r_umr_set_access_flags(dev, &wqe.mkey_seg, access_flags);
410 MLX5_SET(mkc, &wqe.mkey_seg, pd, to_mpd(pd)->pdn);
411 MLX5_SET(mkc, &wqe.mkey_seg, qpn, 0xffffff);
412 MLX5_SET(mkc, &wqe.mkey_seg, mkey_7_0,
415 err = mlx5r_umr_post_send_wait(dev, mr->mmkey.key, &wqe, false);
574 struct mlx5r_umr_wqe *wqe,
581 wqe->ctrl_seg.mkey_mask |= get_umr_enable_mr_mask();
588 wqe->ctrl_seg.mkey_mask |= get_umr_update_access_mask(dev);
589 wqe->ctrl_seg.mkey_mask |= get_umr_update_pd_mask();
596 wqe->ctrl_seg.mkey_mask |= get_umr_update_translation_mask();
598 MLX5_SET(mkc, &wqe->mkey_seg, length64, 1);
601 wqe->ctrl_seg.xlt_octowords =
603 wqe->data_seg.byte_count = cpu_to_be32(sg->length);
615 struct mlx5r_umr_wqe wqe = {};
636 mlx5r_umr_set_update_xlt_ctrl_seg(&wqe.ctrl_seg, flags, &sg);
637 mlx5r_umr_set_update_xlt_mkey_seg(dev, &wqe.mkey_seg, mr,
639 mlx5r_umr_set_update_xlt_data_seg(&wqe.data_seg, &sg);
647 err = mlx5r_umr_post_send_wait(dev, mr->mmkey.key, &wqe,
654 mlx5r_umr_update_offset(&wqe.ctrl_seg, offset);
672 mlx5r_umr_final_update_xlt(dev, &wqe, mr, &sg, flags);
675 err = mlx5r_umr_post_send_wait(dev, mr->mmkey.key, &wqe, true);
698 struct mlx5r_umr_wqe wqe = {};
738 mlx5r_umr_set_update_xlt_ctrl_seg(&wqe.ctrl_seg, flags, &sg);
739 mlx5r_umr_set_update_xlt_mkey_seg(dev, &wqe.mkey_seg, mr, page_shift);
740 mlx5r_umr_set_update_xlt_data_seg(&wqe.data_seg, &sg);
755 mlx5r_umr_final_update_xlt(dev, &wqe, mr, &sg, flags);
756 mlx5r_umr_update_offset(&wqe.ctrl_seg, idx * desc_size);
757 err = mlx5r_umr_post_send_wait(dev, mr->mmkey.key, &wqe, true);