Lines Matching defs:qpc
956 void *qpc;
1010 ubuffer->umem, qpc, log_page_size,
1032 qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
1036 MLX5_SET(qpc, qpc, log_page_size,
1038 MLX5_SET(qpc, qpc, page_offset, page_offset_quantized);
1040 MLX5_SET(qpc, qpc, uar_page, uar_index);
1105 void *qpc;
1162 qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
1163 MLX5_SET(qpc, qpc, uar_page, uar_index);
1164 MLX5_SET(qpc, qpc, ts_format, mlx5_get_qp_default_ts(dev->mdev));
1165 MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);
1168 MLX5_SET(qpc, qpc, fre, 1);
1169 MLX5_SET(qpc, qpc, rlky, 1);
1172 MLX5_SET(qpc, qpc, deth_sqpn, 1);
1346 void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
1386 MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index));
1387 MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd));
1396 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
1397 MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page));
1398 MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
1400 MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
1441 void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
1474 MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index));
1475 MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv));
1485 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
1486 MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
1487 MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);
1490 MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));
1924 void *qpc)
1936 MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE);
1942 MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE);
2003 void *qpc;
2014 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
2016 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_XRC);
2017 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2018 MLX5_SET(qpc, qpc, pd, to_mpd(devr->p0)->pdn);
2021 MLX5_SET(qpc, qpc, block_lb_mc, 1);
2023 MLX5_SET(qpc, qpc, cd_master, 1);
2025 MLX5_SET(qpc, qpc, cd_slave_send, 1);
2027 MLX5_SET(qpc, qpc, cd_slave_receive, 1);
2029 MLX5_SET(qpc, qpc, ts_format, mlx5_get_qp_default_ts(dev->mdev));
2030 MLX5_SET(qpc, qpc, rq_type, MLX5_SRQ_RQ);
2031 MLX5_SET(qpc, qpc, no_sq, 1);
2032 MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
2033 MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn);
2034 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
2035 MLX5_SET(qpc, qpc, xrcd, to_mxrcd(attr->xrcd)->xrcdn);
2036 MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2040 MLX5_SET(qpc, qpc, user_index, uidx);
2043 MLX5_SET(qpc, qpc, end_padding_mode,
2086 void *qpc;
2129 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
2131 MLX5_SET(qpc, qpc, st, mlx5_st);
2132 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2133 MLX5_SET(qpc, qpc, pd, to_mpd(pd)->pdn);
2136 MLX5_SET(qpc, qpc, wq_signature, 1);
2139 MLX5_SET(qpc, qpc, cd_master, 1);
2141 MLX5_SET(qpc, qpc, cd_slave_send, 1);
2143 configure_requester_scat_cqe(dev, qp, init_attr, qpc);
2146 MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
2147 MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2151 MLX5_SET(qpc, qpc, log_num_dci_stream_channels,
2153 MLX5_SET(qpc, qpc, log_num_dci_errored_streams,
2157 MLX5_SET(qpc, qpc, ts_format, ts_format);
2158 MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr));
2160 MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
2164 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn0);
2165 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn,
2168 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn1);
2169 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn,
2174 MLX5_SET(qpc, qpc, cqn_snd,
2178 MLX5_SET(qpc, qpc, cqn_rcv,
2181 MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2185 MLX5_SET(qpc, qpc, user_index, uidx);
2188 MLX5_SET(qpc, qpc, end_padding_mode,
2247 void *qpc;
2300 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
2302 MLX5_SET(qpc, qpc, st, mlx5_st);
2303 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2304 MLX5_SET(qpc, qpc, pd, to_mpd(pd)->pdn);
2307 MLX5_SET(qpc, qpc, wq_signature, 1);
2310 MLX5_SET(qpc, qpc, block_lb_mc, 1);
2313 MLX5_SET(qpc, qpc, cd_master, 1);
2315 MLX5_SET(qpc, qpc, cd_slave_send, 1);
2317 MLX5_SET(qpc, qpc, cd_slave_receive, 1);
2319 MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1);
2325 MLX5_SET(qpc, qpc, cs_res,
2331 configure_requester_scat_cqe(dev, qp, init_attr, qpc);
2334 MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
2335 MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2339 MLX5_SET(qpc, qpc, ts_format, ts_format);
2341 MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr));
2344 MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
2346 MLX5_SET(qpc, qpc, no_sq, 1);
2349 MLX5_SET(qpc, qpc, offload_type,
2356 MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
2357 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn1);
2358 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
2362 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn0);
2363 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn);
2365 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn1);
2366 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn);
2371 MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn);
2374 MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn);
2376 MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2380 MLX5_SET(qpc, qpc, user_index, uidx);
2384 MLX5_SET(qpc, qpc, end_padding_mode,
2447 void *qpc;
2477 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
2479 MLX5_SET(qpc, qpc, st, mlx5_st);
2480 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2483 MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn);
2485 MLX5_SET(qpc, qpc, latency_sensitive, 1);
2489 MLX5_SET(qpc, qpc, block_lb_mc, 1);
2492 MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
2493 MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2496 MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, attr));
2499 MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
2501 MLX5_SET(qpc, qpc, no_sq, 1);
2504 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn0);
2505 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn,
2508 MLX5_SET(qpc, qpc, xrcd, devr->xrcdn1);
2509 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn,
2514 MLX5_SET(qpc, qpc, cqn_snd, to_mcq(attr->send_cq)->mcq.cqn);
2517 MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(attr->recv_cq)->mcq.cqn);
2519 MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2523 MLX5_SET(qpc, qpc, user_index, uidx);
2527 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1);
2531 MLX5_SET(qpc, qpc, retry_mode, MLX5_QP_RM_GO_BACK_N);
3353 void *qpc)
3372 MLX5_SET(qpc, qpc, rre, !!(access_flags & IB_ACCESS_REMOTE_READ));
3381 MLX5_SET(qpc, qpc, rae, 1);
3382 MLX5_SET(qpc, qpc, atomic_mode, atomic_mode);
3385 MLX5_SET(qpc, qpc, rwe, !!(access_flags & IB_ACCESS_REMOTE_WRITE));
4080 u32 *qpc;
4097 qpc = MLX5_ADDR_OF(rts2rts_qp_in, in, qpc);
4098 MLX5_SET(qpc, qpc, counter_set_id, set_id);
4154 void *qpc, *pri_path, *alt_path;
4166 qpc = kzalloc(MLX5_ST_SZ_BYTES(qpc), GFP_KERNEL);
4167 if (!qpc)
4171 MLX5_SET(qpc, qpc, st, mlx5_st);
4174 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
4178 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
4181 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_REARM);
4184 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_ARMED);
4193 MLX5_SET(qpc, qpc, lag_tx_port_affinity, tx_affinity);
4199 MLX5_SET(qpc, qpc, mtu, IB_MTU_256);
4200 MLX5_SET(qpc, qpc, log_msg_max, 8);
4204 MLX5_SET(qpc, qpc, mtu, IB_MTU_4096);
4205 MLX5_SET(qpc, qpc, log_msg_max, 12);
4213 MLX5_SET(qpc, qpc, mtu, attr->path_mtu);
4214 MLX5_SET(qpc, qpc, log_msg_max,
4219 MLX5_SET(qpc, qpc, remote_qpn, attr->dest_qp_num);
4221 pri_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
4222 alt_path = MLX5_ADDR_OF(qpc, qpc, secondary_address_path);
4260 MLX5_SET(qpc, qpc, pd, pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn);
4262 MLX5_SET(qpc, qpc, cqn_snd, send_cq->mcq.cqn);
4264 MLX5_SET(qpc, qpc, cqn_rcv, recv_cq->mcq.cqn);
4266 MLX5_SET(qpc, qpc, log_ack_req_freq, MLX5_IB_ACK_REQ_FREQ);
4269 MLX5_SET(qpc, qpc, rnr_retry, attr->rnr_retry);
4272 MLX5_SET(qpc, qpc, retry_count, attr->retry_cnt);
4275 MLX5_SET(qpc, qpc, log_sra_max, ilog2(attr->max_rd_atomic));
4278 MLX5_SET(qpc, qpc, next_send_psn, attr->sq_psn);
4281 MLX5_SET(qpc, qpc, log_rra_max,
4285 err = set_qpc_atomic_flags(qp, attr, attr_mask, qpc);
4291 MLX5_SET(qpc, qpc, min_rnr_nak, attr->min_rnr_timer);
4294 MLX5_SET(qpc, qpc, next_rcv_psn, attr->rq_psn);
4297 MLX5_SET(qpc, qpc, q_key, attr->qkey);
4300 MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
4314 MLX5_SET(qpc, qpc, counter_set_id, set_id);
4318 MLX5_SET(qpc, qpc, rlky, 1);
4321 MLX5_SET(qpc, qpc, deth_sqpn, 1);
4386 err = mlx5_core_qp_modify(dev, op, optpar, qpc, &base->mqp,
4434 kfree(qpc);
4937 void *qpc, *pri_path, *alt_path;
4950 qpc = MLX5_ADDR_OF(query_qp_out, outb, qpc);
4952 qp->state = to_ib_qp_state(MLX5_GET(qpc, qpc, state));
4953 if (MLX5_GET(qpc, qpc, state) == MLX5_QP_STATE_SQ_DRAINING)
4956 qp_attr->path_mtu = MLX5_GET(qpc, qpc, mtu);
4957 qp_attr->path_mig_state = to_ib_mig_state(MLX5_GET(qpc, qpc, pm_state));
4958 qp_attr->qkey = MLX5_GET(qpc, qpc, q_key);
4959 qp_attr->rq_psn = MLX5_GET(qpc, qpc, next_rcv_psn);
4960 qp_attr->sq_psn = MLX5_GET(qpc, qpc, next_send_psn);
4961 qp_attr->dest_qp_num = MLX5_GET(qpc, qpc, remote_qpn);
4963 if (MLX5_GET(qpc, qpc, rre))
4965 if (MLX5_GET(qpc, qpc, rwe))
4967 if (MLX5_GET(qpc, qpc, rae))
4970 qp_attr->max_rd_atomic = 1 << MLX5_GET(qpc, qpc, log_sra_max);
4971 qp_attr->max_dest_rd_atomic = 1 << MLX5_GET(qpc, qpc, log_rra_max);
4972 qp_attr->min_rnr_timer = MLX5_GET(qpc, qpc, min_rnr_nak);
4973 qp_attr->retry_cnt = MLX5_GET(qpc, qpc, retry_count);
4974 qp_attr->rnr_retry = MLX5_GET(qpc, qpc, rnr_retry);
4976 pri_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
4977 alt_path = MLX5_ADDR_OF(qpc, qpc, secondary_address_path);