Lines Matching defs:path
3504 static void mlx5_set_path_udp_sport(void *path, const struct rdma_ah_attr *ah,
3513 MLX5_SET(ads, path, udp_sport, rdma_flow_label_to_udp_sport(fl));
3517 const struct rdma_ah_attr *ah, void *path, u8 port,
3528 MLX5_SET(ads, path, pkey_index,
3547 ether_addr_copy(MLX5_ADDR_OF(ads, path, rmac_47_32),
3555 mlx5_set_path_udp_sport(path, ah,
3558 MLX5_SET(ads, path, eth_prio, sl & 0x7);
3561 MLX5_SET(ads, path, dscp, grh->traffic_class >> 2);
3563 MLX5_SET(ads, path, fl, !!(path_flags & MLX5_PATH_FLAG_FL));
3564 MLX5_SET(ads, path, free_ar,
3566 MLX5_SET(ads, path, rlid, rdma_ah_get_dlid(ah));
3567 MLX5_SET(ads, path, mlid, rdma_ah_get_path_bits(ah));
3568 MLX5_SET(ads, path, grh, !!(ah_flags & IB_AH_GRH));
3569 MLX5_SET(ads, path, sl, sl);
3573 MLX5_SET(ads, path, src_addr_index, grh->sgid_index);
3574 MLX5_SET(ads, path, hop_limit, grh->hop_limit);
3575 MLX5_SET(ads, path, tclass, grh->traffic_class);
3576 MLX5_SET(ads, path, flow_label, grh->flow_label);
3577 memcpy(MLX5_ADDR_OF(ads, path, rgid_rip), grh->dgid.raw,
3584 MLX5_SET(ads, path, stat_rate, err);
3585 MLX5_SET(ads, path, vhca_port_num, port);
3588 MLX5_SET(ads, path, ack_timeout,
4789 struct rdma_ah_attr *ah_attr, void *path)
4791 int port = MLX5_GET(ads, path, vhca_port_num);
4802 rdma_ah_set_sl(ah_attr, MLX5_GET(ads, path, sl));
4804 rdma_ah_set_dlid(ah_attr, MLX5_GET(ads, path, rlid));
4805 rdma_ah_set_path_bits(ah_attr, MLX5_GET(ads, path, mlid));
4807 static_rate = MLX5_GET(ads, path, stat_rate);
4809 if (MLX5_GET(ads, path, grh) ||
4811 rdma_ah_set_grh(ah_attr, NULL, MLX5_GET(ads, path, flow_label),
4812 MLX5_GET(ads, path, src_addr_index),
4813 MLX5_GET(ads, path, hop_limit),
4814 MLX5_GET(ads, path, tclass));
4815 rdma_ah_set_dgid_raw(ah_attr, MLX5_ADDR_OF(ads, path, rgid_rip));