Lines Matching defs:props

436 				struct ib_device_attr *props,
479 memset(props, 0, sizeof *props);
483 props->fw_ver = dev->dev->caps.fw_ver;
484 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
488 props->kernel_cap_flags = IBK_BLOCK_MULTICAST_LOOPBACK;
490 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
492 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
494 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
496 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
498 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
502 props->kernel_cap_flags |= IBK_UD_TSO;
504 props->kernel_cap_flags |= IBK_LOCAL_DMA_LKEY;
508 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
510 props->device_cap_flags |= IB_DEVICE_XRC;
512 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
515 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
517 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
520 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
522 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
524 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
526 props->vendor_part_id = dev->dev->persist->pdev->device;
527 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
528 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
530 props->max_mr_size = ~0ull;
531 props->page_size_cap = dev->dev->caps.page_size_cap;
532 props->max_qp = dev->dev->quotas.qp;
533 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
534 props->max_send_sge =
536 props->max_recv_sge =
538 props->max_sge_rd = MLX4_MAX_SGE_RD;
539 props->max_cq = dev->dev->quotas.cq;
540 props->max_cqe = dev->dev->caps.max_cqes;
541 props->max_mr = dev->dev->quotas.mpt;
542 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
543 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
544 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
545 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
546 props->max_srq = dev->dev->quotas.srq;
547 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
548 props->max_srq_sge = dev->dev->caps.max_srq_sge;
549 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
550 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
551 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
553 props->masked_atomic_cap = props->atomic_cap;
554 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
555 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
556 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
557 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
558 props->max_mcast_grp;
559 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
560 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
561 props->max_ah = INT_MAX;
566 props->rss_caps.max_rwq_indirection_tables =
567 props->max_qp;
568 props->rss_caps.max_rwq_indirection_table_size =
570 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
571 props->max_wq_type_rq = props->max_qp;
575 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS;
578 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT;
579 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD;
597 if (props->rss_caps.supported_qpts) {
656 struct ib_port_attr *props, int netw_view)
682 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
683 props->lmc = out_mad->data[34] & 0x7;
684 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
685 props->sm_sl = out_mad->data[36] & 0xf;
686 props->state = out_mad->data[32] & 0xf;
687 props->phys_state = out_mad->data[33] >> 4;
688 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
690 props->gid_tbl_len = out_mad->data[50];
692 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
693 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
694 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
695 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
696 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
697 props->active_width = out_mad->data[31] & 0xf;
698 props->active_speed = out_mad->data[35] >> 4;
699 props->max_mtu = out_mad->data[41] & 0xf;
700 props->active_mtu = out_mad->data[36] >> 4;
701 props->subnet_timeout = out_mad->data[51] & 0x1f;
702 props->max_vl_num = out_mad->data[37] >> 4;
703 props->init_type_reply = out_mad->data[41] >> 4;
706 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
711 props->active_speed = IB_SPEED_FDR;
714 props->active_speed = IB_SPEED_EDR;
720 if (props->active_speed == IB_SPEED_QDR) {
732 props->active_speed = IB_SPEED_FDR10;
736 if (props->state == IB_PORT_DOWN)
737 props->active_speed = IB_SPEED_SDR;
752 struct ib_port_attr *props)
773 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
776 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
778 props->port_cap_flags = IB_PORT_CM_SUP;
779 props->ip_gids = true;
780 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
781 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
783 props->pkey_tbl_len = 1;
784 props->max_mtu = IB_MTU_4096;
785 props->max_vl_num = 2;
786 props->state = IB_PORT_DOWN;
787 props->phys_state = state_to_phys_state(props->state);
788 props->active_mtu = IB_MTU_256;
800 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
802 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
804 props->phys_state = state_to_phys_state(props->state);
813 struct ib_port_attr *props, int netw_view)
817 /* props being zeroed by the caller, avoid zeroing it here */
820 ib_link_query_port(ibdev, port, props, netw_view) :
821 eth_link_query_port(ibdev, port, props);
827 struct ib_port_attr *props)
830 return __mlx4_ib_query_port(ibdev, port, props, 0);
998 struct ib_device_modify *props)
1013 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1024 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1060 struct ib_port_modify *props)
1081 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1082 ~props->clr_port_cap_mask;