Lines Matching refs:qw
255 __le64 qw[2];
522 tx->descs[0].qw[0] = SDMA_DESC0_FIRST_DESC_FLAG;
523 tx->descs[0].qw[1] = 0;
525 tx->descs[0].qw[1] |=
578 return (d->qw[1] & SDMA_DESC1_GENERATION_SMASK)
584 return (d->qw[0] & SDMA_DESC0_BYTE_COUNT_SMASK)
590 return (d->qw[0] & SDMA_DESC0_PHY_ADDR_SMASK)
606 /* qw[0] zero; qw[1] first, ahg mode already in from init */
607 desc->qw[1] |= ((u64)type & SDMA_DESC1_GENERATION_MASK)
610 desc->qw[0] = 0;
611 desc->qw[1] = ((u64)type & SDMA_DESC1_GENERATION_MASK)
614 desc->qw[0] |= (((u64)addr & SDMA_DESC0_PHY_ADDR_MASK)
644 tx->descp[last_desc].qw[0] |= SDMA_DESC0_LAST_DESC_FLAG;
645 tx->descp[last_desc].qw[1] |= dd->default_desc1;
647 tx->descp[last_desc].qw[1] |= (SDMA_DESC1_HEAD_TO_HOST_FLAG |