Lines Matching defs:mask
763 e = m->map[vl & m->mask];
764 rval = e->sde[selector & e->mask];
793 u32 mask;
849 sde = map->sde[selector & map->mask];
880 map->mask = pow - 1;
896 cpumask_var_t mask, new_mask;
905 ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
911 free_cpumask_var(mask);
914 ret = cpulist_parse(buf, mask);
918 if (!cpumask_subset(mask, cpu_online_mask)) {
919 dd_dev_warn(sde->dd, "Invalid CPU mask\n");
929 for_each_cpu(cpu, mask) {
952 rht_node->map[vl]->mask = 0;
983 rht_node->map[vl]->mask = pow - 1;
995 /* Don't cleanup sdes that are set in the new mask */
996 if (cpumask_test_cpu(cpu, mask))
1040 free_cpumask_var(mask);
1190 newmap->mask = (1 << ilog2(newmap->vls)) - 1;
1208 newmap->map[i]->mask = (1 << ilog2(sz)) - 1;
1387 /* Create a mask specifically for each interrupt source */
1394 /* Create a combined mask to cover all 3 interrupt sources */
1849 * Status is a mask of the 3 possible interrupts for this engine. It will
3137 void sdma_update_lmc(struct hfi1_devdata *dd, u64 mask, u32 lid)
3143 sreg = ((mask & SD(CHECK_SLID_MASK_MASK)) <<
3145 (((lid & mask) & SD(CHECK_SLID_VALUE_MASK)) <<